nvidia-oot: add IPA type info of IVC channel

Bug 4293372

Signed-off-by: Joshua Cha <joshuac@nvidia.com>
Change-Id: I5c0cf142afdac9a6a1108a38513af6861272a8e9
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2995973
(cherry picked from commit ebedbb2492ea13211b53a48655e9312ba6b255dd)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3004066
Reviewed-by: Kurt Yi <kyi@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Joshua Cha
2023-10-12 19:29:29 +09:00
committed by mobile promotions
parent 1ae12540fe
commit 236a2f09ee
4 changed files with 93 additions and 42 deletions

View File

@@ -1,5 +1,14 @@
// SPDX-License-Identifier: GPL-2.0-only
// Copyright (c) 2019-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* SPDX-FileCopyrightText: Copyright (c) 2019-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
*
* NVIDIA CORPORATION, its affiliates and licensors retain all intellectual
* property and proprietary rights in and to this material, related
* documentation and any modifications thereto. Any use, reproduction,
* disclosure or distribution of this material and related documentation
* without an express license agreement from NVIDIA CORPORATION or
* its affiliates is strictly prohibited.
*/
/*
* This is NvSciIpc kernel driver. At present its only use is to support
@@ -508,11 +517,15 @@ static int nvsciipc_ioctl_set_db(struct nvsciipc *ctx, unsigned int cmd,
entry->vuid = vuid64.value;
/* fill peer vmid */
if (entry->backend == NVSCIIPC_BACKEND_IVC)
if (entry->backend == NVSCIIPC_BACKEND_IVC) {
/* Sometimes it fails to find vmid due to bad configuration
* in PCT but it is not error. Hence ignore result
*/
(void)ivc_cdev_get_peer_vmid(entry->id, &entry->peer_vmid);
(void)ivc_cdev_get_noti_type(entry->id, &entry->noti_type);
} else {
entry->noti_type = IVC_INVALID_IPA;
}
}
}
#endif /* CONFIG_TEGRA_VIRTUALIZATION */
@@ -654,14 +667,14 @@ static ssize_t nvsciipc_dbg_read(struct file *filp, char __user *buf,
}
for (i = 0; i < ctx->num_eps; i++) {
INFO("EP[%03d]: ep_name: %s, dev_name: %s, backend: %u, nframes: %u, "
"frame_size: %u, id: %u\n", i,
ctx->db[i]->ep_name,
ctx->db[i]->dev_name,
ctx->db[i]->backend,
ctx->db[i]->nframes,
ctx->db[i]->frame_size,
ctx->db[i]->id);
INFO("EP[%03d]: ep:%s,dev:%s,be:%u,nfrm:%u,fsz:%u,id:%u,noti:%d(TRAP:1,MSI:2)\n", i,
ctx->db[i]->ep_name,
ctx->db[i]->dev_name,
ctx->db[i]->backend,
ctx->db[i]->nframes,
ctx->db[i]->frame_size,
ctx->db[i]->id,
ctx->db[i]->noti_type);
}
return 0;

View File

@@ -1,6 +1,13 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
*
* NVIDIA CORPORATION, its affiliates and licensors retain all intellectual
* property and proprietary rights in and to this material, related
* documentation and any modifications thereto. Any use, reproduction,
* disclosure or distribution of this material and related documentation
* without an express license agreement from NVIDIA CORPORATION or
* its affiliates is strictly prohibited.
*/
#include <nvidia/conftest.h>
@@ -283,10 +290,13 @@ static long ivc_dev_ioctl(struct file *filp, unsigned int cmd,
info.queue_offset = ivcd->qd->offset;
info.area_size = ivc_area_size;
#ifdef SUPPORTS_TRAP_MSI_NOTIFICATION
if (ivcd->qd->msi_ipa != 0)
if (ivcd->qd->msi_ipa != 0) {
info.noti_ipa = ivcd->qd->msi_ipa;
else
info.noti_type = IVC_MSI_IPA;
} else {
info.noti_ipa = ivcd->qd->trap_ipa;
info.noti_type = IVC_TRAP_IPA;
}
info.noti_irq = ivcd->qd->raise_irq;
#endif /* SUPPORTS_TRAP_MSI_NOTIFICATION */
@@ -624,6 +634,39 @@ exit:
}
EXPORT_SYMBOL(ivc_cdev_get_peer_vmid);
int ivc_cdev_get_noti_type(uint32_t qid, uint32_t *noti_type)
{
uint32_t i;
int32_t ret = -ENOENT;
if ((s_infop == NULL) || (s_guestid == INVALID_VMID)) {
ERR("ivc info or VMID is NOT initialized yet");
ret = -EFAULT;
goto exit;
}
for (i = 0; i < s_infop->nr_queues; i++) {
struct ivc_dev *ivc = &ivc_dev_array[i];
if (ivc->qd->id == qid) {
if (ivc->qd->msi_ipa != 0)
*noti_type = IVC_MSI_IPA;
else
*noti_type = IVC_TRAP_IPA;
ret = 0;
DBG("found qid %d: noti_type=%d\n", qid, *noti_type);
break;
}
}
if (ret != 0)
INFO("qid %d not found\n", qid);
exit:
return ret;
}
EXPORT_SYMBOL(ivc_cdev_get_noti_type);
module_init(ivc_init);
module_exit(ivc_exit);

View File

@@ -1,32 +1,13 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2019-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
*
* This header is BSD licensed so anyone can use the definitions to implement
* compatible drivers/servers.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of NVIDIA CORPORATION nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL NVIDIA CORPORATION OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* NVIDIA CORPORATION, its affiliates and licensors retain all intellectual
* property and proprietary rights in and to this material, related
* documentation and any modifications thereto. Any use, reproduction,
* disclosure or distribution of this material and related documentation
* without an express license agreement from NVIDIA CORPORATION or
* its affiliates is strictly prohibited.
*/
#ifndef __NVSCIIPC_IOCTL_H__
@@ -57,6 +38,7 @@ struct nvsciipc_config_entry {
uint32_t remote_port;
uint32_t local_port;
uint32_t peer_vmid;
uint32_t noti_type;
};
struct nvsciipc_db {

View File

@@ -1,6 +1,13 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
*
* NVIDIA CORPORATION, its affiliates and licensors retain all intellectual
* property and proprietary rights in and to this material, related
* documentation and any modifications thereto. Any use, reproduction,
* disclosure or distribution of this material and related documentation
* without an express license agreement from NVIDIA CORPORATION or
* its affiliates is strictly prohibited.
*/
#ifndef __UAPI_TEGRA_IVC_DEV_H
@@ -8,6 +15,10 @@
#include <linux/ioctl.h>
#define IVC_INVALID_IPA 0U
#define IVC_TRAP_IPA 1U
#define IVC_MSI_IPA 2U
struct nvipc_ivc_info {
uint32_t nframes;
uint32_t frame_size;
@@ -17,6 +28,7 @@ struct nvipc_ivc_info {
bool rx_first;
uint64_t noti_ipa;
uint16_t noti_irq;
uint16_t noti_type; /* IVC_TRAP_IPA, IVC_MSI_IPA */
};
/* IOCTL magic number */
@@ -37,5 +49,6 @@ struct nvipc_ivc_info {
#define NVIPC_IVC_IOCTL_NUMBER_MAX 3
int ivc_cdev_get_peer_vmid(uint32_t qid, uint32_t *peer_vmid);
int ivc_cdev_get_noti_type(uint32_t qid, uint32_t *noti_type);
#endif