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platform: tegra: camera: add operation callback
The Nvhost-related APIs have been deprecated and are no longer
supported since our migration from K510 to K515. Therefore, the camera
platform driver should refrain from using "nvhost_*" functions to set
the clock rate.
Integrate the common operation callback interface into the
tegra_camera_dev_info structure. This modification allows individual
drivers to achieve clock set rate operations by registering the
callback and completing the implementation.
Bug 4374126
Signed-off-by: Johnny Liu <johnliu@nvidia.com>
Change-Id: Iebed7cc974f5dbdabddded3c84d0925de3a6c4f9
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3020535
(cherry picked from commit 57a82628aa)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3023111
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
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@@ -1,6 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2015-2022, NVIDIA CORPORATION. All rights reserved.
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* SPDX-FileCopyrightText: Copyright (C) 2015-2023 NVIDIA CORPORATION. All rights reserved.
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*/
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#ifndef _TEGRA_CAMERA_PLATFORM_H_
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@@ -38,6 +38,16 @@ enum tegra_camera_sensor_type {
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SENSORTYPE_MAX,
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};
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struct tegra_camera_dev_info;
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/**
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* struct tegra_camera_dev_ops - camera device operations
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* @set_rate: set the device clock rate
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*/
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struct tegra_camera_dev_ops {
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int (*set_rate)(struct tegra_camera_dev_info *cdev_info, unsigned long rate);
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};
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/**
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* struct tegra_camera_dev_info - camera devices information
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* @priv: a unique identifier assigned during registration
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@@ -45,8 +55,6 @@ enum tegra_camera_sensor_type {
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* @bus_width: csi bus width for clock calculation
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* @overhead: hw/ sw overhead considered while calculations
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* @ppc: HW capability, pixels per clock
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* @clk_rate: calculated clk rate for this node
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* @actual_clk_rate: clk rate set by nvhost
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* @bw: calculated bw for this node
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* @use_max: populated by hw engine to decide it's clocking policy
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* @memory_latency: latency allowed for memory freq scaling
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@@ -57,6 +65,7 @@ enum tegra_camera_sensor_type {
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* @bpp: bytes per pixel
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* @stream_on: stream enabled on the channel
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* @device_node: list node
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* @ops: operation callbacks of the camera device
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*/
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struct tegra_camera_dev_info {
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void *priv;
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@@ -66,9 +75,7 @@ struct tegra_camera_dev_info {
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u64 lane_speed;
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u32 lane_num;
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u32 ppc;
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u64 clk_rate;
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u64 pg_clk_rate;
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unsigned long actual_clk_rate;
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u64 bw;
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bool use_max;
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u32 memory_latency;
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@@ -79,6 +86,7 @@ struct tegra_camera_dev_info {
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u32 bpp;
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bool stream_on;
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struct list_head device_node;
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const struct tegra_camera_dev_ops *ops;
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};
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int tegra_camera_update_isobw(void);
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