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drm/tegra: nvhost support for t264

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- VIC RISC-V EB boot support
- Programming sequence modification needed for Thor
- Reloc block linear addressing not needed for t264

Bug 4132685

Signed-off-by: Santosh BS <santoshb@nvidia.com>
Change-Id: I8ad47cce31cfd06020e33d3457a0d674a11e4d49
This commit is contained in:
Santosh BS
2023-08-08 15:17:56 +00:00
committed by Jon Hunter
parent 340bd4418f
commit 26b1cb4a82
8 changed files with 416 additions and 59 deletions
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17
drivers/gpu/drm/tegra/riscv.h
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@@ -14,11 +14,23 @@ struct tegra_drm_riscv_descriptor {
u32 data_size;
};
struct tegra_drm_riscv_firmware {
/* Firmware after it is read but not loaded */
const struct firmware *firmware;
/* Raw firmware data */
dma_addr_t iova;
dma_addr_t phys;
void *virt;
size_t size;
};
struct tegra_drm_riscv {
/* User initializes */
struct device *dev;
void __iomem *regs;
struct tegra_drm_riscv_firmware firmware;
struct tegra_drm_riscv_descriptor bl_desc;
struct tegra_drm_riscv_descriptor os_desc;
};
@@ -26,5 +38,10 @@ struct tegra_drm_riscv {
int tegra_drm_riscv_read_descriptors(struct tegra_drm_riscv *riscv);
int tegra_drm_riscv_boot_bootrom(struct tegra_drm_riscv *riscv, phys_addr_t image_address,
u32 gscid, const struct tegra_drm_riscv_descriptor *desc);
int tegra_drm_riscv_init(struct tegra_drm_riscv *riscv);
void tegra_drm_riscv_exit(struct tegra_drm_riscv *riscv);
int tegra_drm_riscv_read_firmware(struct tegra_drm_riscv *riscv, const char *firmware_name);
int tegra_drm_riscv_load_firmware(struct tegra_drm_riscv *riscv);
int tegra_drm_riscv_boot_external(struct tegra_drm_riscv *riscv);
#endif