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gpu: host1x: move disply related code under CONFIG_DRM_TEGRA_HAVE_DISPLAY
As display support is not needed for recent chips, move the related codes under CONFIG_DRM_TEGRA_HAVE_DISPLAY configs accordingly. Jira HOSTX-5833 Change-Id: Ie1cfd730a69fcb7d9e26600487a11f720fc509ba Signed-off-by: Santosh BS <santoshb@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3292240 Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
@@ -1,5 +1,5 @@
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# SPDX-License-Identifier: GPL-2.0-only
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# SPDX-License-Identifier: GPL-2.0-only
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# Copyright (c) 2022-2024, NVIDIA CORPORATION. All rights reserved.
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# Copyright (c) 2022-2025, NVIDIA CORPORATION. All rights reserved.
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host1x-y = \
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host1x-y = \
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bus.o \
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bus.o \
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@@ -24,11 +24,7 @@ host1x-$(CONFIG_ARCH_TEGRA_194_SOC) += hw/host1x07.o
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host1x-$(CONFIG_ARCH_TEGRA_234_SOC) += hw/host1x08.o
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host1x-$(CONFIG_ARCH_TEGRA_234_SOC) += hw/host1x08.o
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host1x-$(CONFIG_ARCH_TEGRA_264_SOC) += hw/host1x09.o
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host1x-$(CONFIG_ARCH_TEGRA_264_SOC) += hw/host1x09.o
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ifneq ($(filter y, $(CONFIG_ARCH_TEGRA_2x_SOC) $(CONFIG_ARCH_TEGRA_3x_SOC) \
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host1x-$(CONFIG_DRM_TEGRA_HAVE_DISPLAY) += mipi.o
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$(CONFIG_ARCH_TEGRA_114_SOC) $(CONFIG_ARCH_TEGRA_124_SOC) $(CONFIG_ARCH_TEGRA_132_SOC) \
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$(CONFIG_ARCH_TEGRA_210_SOC) $(CONFIG_ARCH_TEGRA_186_SOC) $(CONFIG_ARCH_TEGRA_194_SOC)),)
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host1x-y += mipi.o
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endif
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host1x-$(CONFIG_IOMMU_API) += \
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host1x-$(CONFIG_IOMMU_API) += \
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context.o
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context.o
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@@ -2,7 +2,7 @@
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/*
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/*
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* Tegra host1x driver
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* Tegra host1x driver
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*
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*
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* SPDX-FileCopyrightText: Copyright (c) 2010-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-FileCopyrightText: Copyright (c) 2010-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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*/
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*/
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#include <nvidia/conftest.h>
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#include <nvidia/conftest.h>
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@@ -532,7 +532,6 @@ static const struct host1x_info host1x08_info = {
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.streamid_vm_table = { 0x1004, 128 },
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.streamid_vm_table = { 0x1004, 128 },
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.classid_vm_table = { 0x1404, 25 },
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.classid_vm_table = { 0x1404, 25 },
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.mmio_vm_table = { 0x1504, 25 },
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.mmio_vm_table = { 0x1504, 25 },
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.reserve_vblank_syncpts = false,
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};
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};
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#endif
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#endif
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@@ -670,7 +669,6 @@ static const struct host1x_info host1x09_info = {
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.streamid_vm_table = { 0x1004, 128 },
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.streamid_vm_table = { 0x1004, 128 },
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.classid_vm_table = { 0x1404, 25 },
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.classid_vm_table = { 0x1404, 25 },
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.mmio_vm_table = { 0x1504, 25 },
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.mmio_vm_table = { 0x1504, 25 },
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.reserve_vblank_syncpts = false,
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};
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};
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#endif
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#endif
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@@ -1369,9 +1367,7 @@ static struct platform_driver tegra_host1x_driver = {
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static struct platform_driver * const drivers[] = {
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static struct platform_driver * const drivers[] = {
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&tegra_host1x_driver,
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&tegra_host1x_driver,
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#if IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) || IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) || \
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#ifdef CONFIG_DRM_TEGRA_HAVE_DISPLAY
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IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) || IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC) || IS_ENABLED(CONFIG_ARCH_TEGRA_132_SOC) || \
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IS_ENABLED(CONFIG_ARCH_TEGRA_210_SOC) || IS_ENABLED(CONFIG_ARCH_TEGRA_186_SOC) || IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC)
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&tegra_mipi_driver,
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&tegra_mipi_driver,
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#endif
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#endif
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};
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};
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@@ -1,6 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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/*
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* Copyright (c) 2012-2024, NVIDIA CORPORATION & AFFILIATES. All Rights Reserved.
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* Copyright (c) 2012-2025, NVIDIA CORPORATION & AFFILIATES. All Rights Reserved.
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*/
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*/
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#ifndef HOST1X_DEV_H
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#ifndef HOST1X_DEV_H
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@@ -134,7 +134,9 @@ struct host1x_info {
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* 26/27 on VBLANK. As such we cannot use these syncpoints until
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* 26/27 on VBLANK. As such we cannot use these syncpoints until
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* the display driver disables VBLANK increments.
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* the display driver disables VBLANK increments.
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*/
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*/
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#ifdef CONFIG_DRM_TEGRA_HAVE_DISPLAY
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bool reserve_vblank_syncpts;
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bool reserve_vblank_syncpts;
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#endif
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};
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};
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struct host1x_syncpt_pool {
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struct host1x_syncpt_pool {
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@@ -416,9 +418,7 @@ static inline void host1x_hw_show_mlocks(struct host1x *host, struct output *o)
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host->debug_op->show_mlocks(host, o);
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host->debug_op->show_mlocks(host, o);
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}
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}
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#if IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) || IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) || \
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#ifdef CONFIG_DRM_TEGRA_HAVE_DISPLAY
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IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) || IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC) || IS_ENABLED(CONFIG_ARCH_TEGRA_132_SOC) || \
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IS_ENABLED(CONFIG_ARCH_TEGRA_210_SOC) || IS_ENABLED(CONFIG_ARCH_TEGRA_186_SOC) || IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC)
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extern struct platform_driver tegra_mipi_driver;
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extern struct platform_driver tegra_mipi_driver;
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#endif
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#endif
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@@ -385,10 +385,12 @@ int host1x_syncpt_init(struct host1x *host)
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syncpt[0].name = kstrdup("reserved", GFP_KERNEL);
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syncpt[0].name = kstrdup("reserved", GFP_KERNEL);
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}
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}
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#ifdef CONFIG_DRM_TEGRA_HAVE_DISPLAY
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if (host->info->reserve_vblank_syncpts) {
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if (host->info->reserve_vblank_syncpts) {
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kref_init(&host->syncpt[26].ref);
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kref_init(&host->syncpt[26].ref);
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kref_init(&host->syncpt[27].ref);
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kref_init(&host->syncpt[27].ref);
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}
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}
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#endif
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return 0;
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return 0;
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}
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}
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@@ -584,6 +586,7 @@ u32 host1x_syncpt_base_id(struct host1x_syncpt_base *base)
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EXPORT_SYMBOL(host1x_syncpt_base_id);
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EXPORT_SYMBOL(host1x_syncpt_base_id);
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#endif
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#endif
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#ifdef CONFIG_DRM_TEGRA_HAVE_DISPLAY
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static void do_nothing(struct kref *ref)
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static void do_nothing(struct kref *ref)
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{
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{
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}
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}
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@@ -611,6 +614,7 @@ void host1x_syncpt_release_vblank_reservation(struct host1x_client *client,
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kref_put(&host->syncpt[syncpt_id].ref, do_nothing);
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kref_put(&host->syncpt[syncpt_id].ref, do_nothing);
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}
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}
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EXPORT_SYMBOL(host1x_syncpt_release_vblank_reservation);
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EXPORT_SYMBOL(host1x_syncpt_release_vblank_reservation);
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#endif
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int host1x_syncpt_get_shim_info(struct host1x *host, phys_addr_t *base, u32 *stride,
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int host1x_syncpt_get_shim_info(struct host1x *host, phys_addr_t *base, u32 *stride,
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u32 *num_syncpts)
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u32 *num_syncpts)
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@@ -256,8 +256,10 @@ struct host1x_syncpt_base *host1x_syncpt_get_base(struct host1x_syncpt *sp);
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u32 host1x_syncpt_base_id(struct host1x_syncpt_base *base);
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u32 host1x_syncpt_base_id(struct host1x_syncpt_base *base);
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#endif
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#endif
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#ifdef CONFIG_DRM_TEGRA_HAVE_DISPLAY
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void host1x_syncpt_release_vblank_reservation(struct host1x_client *client,
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void host1x_syncpt_release_vblank_reservation(struct host1x_client *client,
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u32 syncpt_id);
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u32 syncpt_id);
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#endif
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int host1x_syncpt_get_shim_info(struct host1x *host, phys_addr_t *base, u32 *stride,
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int host1x_syncpt_get_shim_info(struct host1x *host, phys_addr_t *base, u32 *stride,
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u32 *num_syncpts);
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u32 *num_syncpts);
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