gpu: host1x: move disply related code under CONFIG_DRM_TEGRA_HAVE_DISPLAY

As display support is not needed for recent chips,
 move the related codes under CONFIG_DRM_TEGRA_HAVE_DISPLAY configs accordingly.

Jira HOSTX-5833

Change-Id: Ie1cfd730a69fcb7d9e26600487a11f720fc509ba
Signed-off-by: Santosh BS <santoshb@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3292240
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Santosh BS
2025-01-28 13:27:43 +00:00
committed by Jon Hunter
parent 91751dfb74
commit 2e59ef0253
5 changed files with 14 additions and 16 deletions

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@@ -1,5 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-only
# Copyright (c) 2022-2024, NVIDIA CORPORATION. All rights reserved.
# Copyright (c) 2022-2025, NVIDIA CORPORATION. All rights reserved.
host1x-y = \
bus.o \
@@ -24,11 +24,7 @@ host1x-$(CONFIG_ARCH_TEGRA_194_SOC) += hw/host1x07.o
host1x-$(CONFIG_ARCH_TEGRA_234_SOC) += hw/host1x08.o
host1x-$(CONFIG_ARCH_TEGRA_264_SOC) += hw/host1x09.o
ifneq ($(filter y, $(CONFIG_ARCH_TEGRA_2x_SOC) $(CONFIG_ARCH_TEGRA_3x_SOC) \
$(CONFIG_ARCH_TEGRA_114_SOC) $(CONFIG_ARCH_TEGRA_124_SOC) $(CONFIG_ARCH_TEGRA_132_SOC) \
$(CONFIG_ARCH_TEGRA_210_SOC) $(CONFIG_ARCH_TEGRA_186_SOC) $(CONFIG_ARCH_TEGRA_194_SOC)),)
host1x-y += mipi.o
endif
host1x-$(CONFIG_DRM_TEGRA_HAVE_DISPLAY) += mipi.o
host1x-$(CONFIG_IOMMU_API) += \
context.o

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@@ -2,7 +2,7 @@
/*
* Tegra host1x driver
*
* SPDX-FileCopyrightText: Copyright (c) 2010-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2010-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
*/
#include <nvidia/conftest.h>
@@ -532,7 +532,6 @@ static const struct host1x_info host1x08_info = {
.streamid_vm_table = { 0x1004, 128 },
.classid_vm_table = { 0x1404, 25 },
.mmio_vm_table = { 0x1504, 25 },
.reserve_vblank_syncpts = false,
};
#endif
@@ -670,7 +669,6 @@ static const struct host1x_info host1x09_info = {
.streamid_vm_table = { 0x1004, 128 },
.classid_vm_table = { 0x1404, 25 },
.mmio_vm_table = { 0x1504, 25 },
.reserve_vblank_syncpts = false,
};
#endif
@@ -1369,9 +1367,7 @@ static struct platform_driver tegra_host1x_driver = {
static struct platform_driver * const drivers[] = {
&tegra_host1x_driver,
#if IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) || IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) || \
IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) || IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC) || IS_ENABLED(CONFIG_ARCH_TEGRA_132_SOC) || \
IS_ENABLED(CONFIG_ARCH_TEGRA_210_SOC) || IS_ENABLED(CONFIG_ARCH_TEGRA_186_SOC) || IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC)
#ifdef CONFIG_DRM_TEGRA_HAVE_DISPLAY
&tegra_mipi_driver,
#endif
};

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@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2012-2024, NVIDIA CORPORATION & AFFILIATES. All Rights Reserved.
* Copyright (c) 2012-2025, NVIDIA CORPORATION & AFFILIATES. All Rights Reserved.
*/
#ifndef HOST1X_DEV_H
@@ -134,7 +134,9 @@ struct host1x_info {
* 26/27 on VBLANK. As such we cannot use these syncpoints until
* the display driver disables VBLANK increments.
*/
#ifdef CONFIG_DRM_TEGRA_HAVE_DISPLAY
bool reserve_vblank_syncpts;
#endif
};
struct host1x_syncpt_pool {
@@ -416,9 +418,7 @@ static inline void host1x_hw_show_mlocks(struct host1x *host, struct output *o)
host->debug_op->show_mlocks(host, o);
}
#if IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) || IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) || \
IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) || IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC) || IS_ENABLED(CONFIG_ARCH_TEGRA_132_SOC) || \
IS_ENABLED(CONFIG_ARCH_TEGRA_210_SOC) || IS_ENABLED(CONFIG_ARCH_TEGRA_186_SOC) || IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC)
#ifdef CONFIG_DRM_TEGRA_HAVE_DISPLAY
extern struct platform_driver tegra_mipi_driver;
#endif

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@@ -385,10 +385,12 @@ int host1x_syncpt_init(struct host1x *host)
syncpt[0].name = kstrdup("reserved", GFP_KERNEL);
}
#ifdef CONFIG_DRM_TEGRA_HAVE_DISPLAY
if (host->info->reserve_vblank_syncpts) {
kref_init(&host->syncpt[26].ref);
kref_init(&host->syncpt[27].ref);
}
#endif
return 0;
}
@@ -584,6 +586,7 @@ u32 host1x_syncpt_base_id(struct host1x_syncpt_base *base)
EXPORT_SYMBOL(host1x_syncpt_base_id);
#endif
#ifdef CONFIG_DRM_TEGRA_HAVE_DISPLAY
static void do_nothing(struct kref *ref)
{
}
@@ -611,6 +614,7 @@ void host1x_syncpt_release_vblank_reservation(struct host1x_client *client,
kref_put(&host->syncpt[syncpt_id].ref, do_nothing);
}
EXPORT_SYMBOL(host1x_syncpt_release_vblank_reservation);
#endif
int host1x_syncpt_get_shim_info(struct host1x *host, phys_addr_t *base, u32 *stride,
u32 *num_syncpts)

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@@ -256,8 +256,10 @@ struct host1x_syncpt_base *host1x_syncpt_get_base(struct host1x_syncpt *sp);
u32 host1x_syncpt_base_id(struct host1x_syncpt_base *base);
#endif
#ifdef CONFIG_DRM_TEGRA_HAVE_DISPLAY
void host1x_syncpt_release_vblank_reservation(struct host1x_client *client,
u32 syncpt_id);
#endif
int host1x_syncpt_get_shim_info(struct host1x *host, phys_addr_t *base, u32 *stride,
u32 *num_syncpts);