mfd: max77851: Enter SLEEP on suspend based on DT

Add option to disable entry to SLEEP when system is suspended.
There are systems where SW_SLP is not necessary on system suspend
as it could be managed differently. Provide an option not to enter
SLEEP state during suspend for such systems.

Bug 3643699

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Change-Id: I1600d0d053a15e18c7419a377962b76845bb92b5
Reviewed-on: https://git-master.nvidia.com/r/c/linux-5.10/+/2712396
(cherry picked from commit a83d4b50fdef4af7a9360224cad0357672bbd380)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-5.10/+/2717492
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2938654
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Akhil R
2022-05-14 08:09:10 +05:30
committed by mobile promotions
parent 1ab8a495fc
commit 3006e5b42f
2 changed files with 17 additions and 10 deletions

View File

@@ -193,6 +193,8 @@ static int max77851_config_master_fps(struct max77851_chip *chip)
return ret; return ret;
} }
chip->sleep_on_suspend = of_property_read_bool(np, "maxim,sleep-on-suspend");
ret = of_property_read_u32(np, "maxim,sleep-exit-slot-period-us", &pval); ret = of_property_read_u32(np, "maxim,sleep-exit-slot-period-us", &pval);
chip->fps_master_slpx_slot_period = (!ret) ? pval : FPS_PERIOD_4KHZ_050US; chip->fps_master_slpx_slot_period = (!ret) ? pval : FPS_PERIOD_4KHZ_050US;
@@ -581,11 +583,13 @@ static int max77851_i2c_suspend(struct device *dev)
struct i2c_client *client = to_i2c_client(dev); struct i2c_client *client = to_i2c_client(dev);
int ret; int ret;
/* FPS on -> sleep */ if (chip->sleep_on_suspend) {
ret = regmap_write(chip->rmap, FPS_SW_REG, FPS_SW_SLP); /* FPS on -> sleep */
if (ret < 0) { ret = regmap_write(chip->rmap, FPS_SW_REG, FPS_SW_SLP);
dev_err(dev, "Reg 0x%02x write failed, %d\n", FPS_SW_REG, ret); if (ret < 0) {
return ret; dev_err(dev, "Reg 0x%02x write failed, %d\n", FPS_SW_REG, ret);
return ret;
}
} }
disable_irq(client->irq); disable_irq(client->irq);
@@ -599,11 +603,13 @@ static int max77851_i2c_resume(struct device *dev)
struct i2c_client *client = to_i2c_client(dev); struct i2c_client *client = to_i2c_client(dev);
int ret; int ret;
/* FPS sleep -> on */ if (chip->sleep_on_suspend) {
ret = regmap_write(chip->rmap, FPS_SW_REG, FPS_SW_ON); /* FPS sleep -> on */
if (ret < 0) { ret = regmap_write(chip->rmap, FPS_SW_REG, FPS_SW_ON);
dev_err(dev, "Reg 0x%02x write failed, %d\n", FPS_SW_REG, ret); if (ret < 0) {
return ret; dev_err(dev, "Reg 0x%02x write failed, %d\n", FPS_SW_REG, ret);
return ret;
}
} }
enable_irq(client->irq); enable_irq(client->irq);

View File

@@ -1704,6 +1704,7 @@ struct max77851_chip {
bool sleep_enable; bool sleep_enable;
bool enable_global_lpm; bool enable_global_lpm;
bool sleep_on_suspend;
unsigned int fps_master_pd_slot_period; unsigned int fps_master_pd_slot_period;
unsigned int fps_master_pu_slot_period; unsigned int fps_master_pu_slot_period;