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DCE KMD: Add timeout into synchronous IPC calls

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This is for avoiding kernel hang when DCE FW fails to respond.
Failures of IPC call will return -ERESTARTSYS or -ETIMEOUT, which
will be handled by caller functions:
1. tegra_dce_client_ipc_send_recv (EXPORT_SYMBOL)
   This is module export symbol and caller have the responsibility
   of checking return value.
2. DCE FSM event handler
   Error return will change back to previous state.

DCE_IPC_TIMEOUT_MS_MAX is set to 10000[ms]
SHA computation time on SC7 entry request can go up 2sec.
Host tolerance time must be larger than this.

Jira TDS-16567
https://nvbugspro.nvidia.com/bug/5335034

Change-Id: I5d77a9497f14f305d07b98e39a58fbcecafedf92
Signed-off-by: charliej <charliej@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3358620
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Mahesh Kumar <mahkumar@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Tested-by: Mahesh Kumar <mahkumar@nvidia.com>
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
(cherry picked from commit 6c2ab3c78ce7cba0e88455b263d51d1a88c03927)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3402917
This commit is contained in:
charliej
2025-05-07 07:16:51 +00:00
committed by Jon Hunter
parent 9a57665a0f
commit 31cf676050
5 changed files with 27 additions and 28 deletions
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8
drivers/platform/tegra/dce/include/dce.h
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@@ -114,6 +114,14 @@
#define DCE_WAIT_LOG 4
#define DCE_MAX_WAIT 5
/**
* DCE IPC timeout values.
* This is for avoiding kernel lockup due to infinite wait on ipc channel.
* Max SHA calculation time is 2sec upon SC7 entry request.
* Host wait time must be larger than this.
*/
#define DCE_IPC_TIMEOUT_MS_MAX 10000 /* Max timeout, 10 seconds */
struct tegra_dce;
/**