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git://nv-tegra.nvidia.com/linux-nv-oot.git
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DCE KMD: Add timeout into synchronous IPC calls
This is for avoiding kernel hang when DCE FW fails to respond. Failures of IPC call will return -ERESTARTSYS or -ETIMEOUT, which will be handled by caller functions: 1. tegra_dce_client_ipc_send_recv (EXPORT_SYMBOL) This is module export symbol and caller have the responsibility of checking return value. 2. DCE FSM event handler Error return will change back to previous state. DCE_IPC_TIMEOUT_MS_MAX is set to 10000[ms] SHA computation time on SC7 entry request can go up 2sec. Host tolerance time must be larger than this. Jira TDS-16567 https://nvbugspro.nvidia.com/bug/5335034 Change-Id: I5d77a9497f14f305d07b98e39a58fbcecafedf92 Signed-off-by: charliej <charliej@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3358620 GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com> Reviewed-by: Mahesh Kumar <mahkumar@nvidia.com> Reviewed-by: svcacv <svcacv@nvidia.com> Tested-by: Mahesh Kumar <mahkumar@nvidia.com> Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com> (cherry picked from commit 6c2ab3c78ce7cba0e88455b263d51d1a88c03927) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3402917
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@@ -36,22 +36,18 @@
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*
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* @d : Pointer to tegra_dce struct.
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*
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* Return : 0 if successful
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* Return : 0 if successful, -ETIMEOUT if timeout, -ERESTARTSYS if interrupted by signal
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*/
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int dce_admin_ipc_wait(struct tegra_dce *d)
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{
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int ret = 0;
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ret = dce_wait_cond_wait_interruptible(d, &d->ipc_waits[DCE_WAIT_ADMIN_IPC], true, 0);
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ret = dce_wait_cond_wait_interruptible(d, &d->ipc_waits[DCE_WAIT_ADMIN_IPC], true,
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DCE_IPC_TIMEOUT_MS_MAX);
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if (ret) {
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/**
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* TODO: Add error handling for abort and retry
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*/
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dce_os_err(d, "Admin IPC wait was interrupted with err:%d", ret);
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goto out;
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dce_os_err(d, "Admin IPC wait, interrupted or timedout:%d", ret);
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}
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out:
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return ret;
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}
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@@ -899,10 +895,10 @@ int dce_admin_send_enter_sc7(struct tegra_dce *d,
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}
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/* Wait for SC7 Enter done */
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ret = dce_wait_cond_wait_interruptible(d, &d->ipc_waits[DCE_WAIT_SC7_ENTER], true, 0);
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ret = dce_wait_cond_wait_interruptible(d, &d->ipc_waits[DCE_WAIT_SC7_ENTER], true,
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DCE_IPC_TIMEOUT_MS_MAX);
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if (ret) {
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dce_os_err(d, "SC7 Enter wait was interrupted with err:%d", ret);
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goto out;
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dce_os_err(d, "SC7 Enter wait, interrupted or timedout:%d", ret);
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}
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out:
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@@ -124,12 +124,10 @@ int dce_handle_boot_complete_requested_event(struct tegra_dce *d, void *params)
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dce_os_debug(d, "Waiting for dce fw to boot...");
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ret = dce_wait_cond_wait_interruptible(d, &d->ipc_waits[DCE_WAIT_BOOT_COMPLETE], true, 0);
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ret = dce_wait_cond_wait_interruptible(d, &d->ipc_waits[DCE_WAIT_BOOT_COMPLETE], true,
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0);
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if (ret) {
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/**
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* TODO: Add error handling for abort and retry
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*/
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dce_os_err(d, "dce boot wait was interrupted with err:%d", ret);
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dce_os_err(d, "dce boot wait, interrupted:%d", ret);
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}
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boot_done:
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@@ -388,13 +386,10 @@ static int dce_mailbox_wait_boot_interface(struct tegra_dce *d)
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u32 status;
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int ret;
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ret = dce_wait_cond_wait_interruptible(d, &d->ipc_waits[DCE_WAIT_BOOT_CMD], true, 0);
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if (ret) {
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/**
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* TODO: Add error handling for abort and retry
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*/
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dce_os_err(d, "dce mbox wait was interrupted with err:%d", ret);
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}
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ret = dce_wait_cond_wait_interruptible(d, &d->ipc_waits[DCE_WAIT_BOOT_CMD], true,
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DCE_IPC_TIMEOUT_MS_MAX);
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if (ret)
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dce_os_err(d, "dce mbox wait was interrupted or timedout:%d", ret);
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status = dce_mailbox_get_interface_status(d,
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DCE_MAILBOX_BOOT_INTERFACE);
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@@ -405,8 +400,8 @@ static int dce_mailbox_wait_boot_interface(struct tegra_dce *d)
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status);
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return -EBADE;
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}
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return 0;
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/* if boot failure flag is not available, return ETIMEOUT or ERESTARTSYS */
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return ret;
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}
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/**
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@@ -369,7 +369,7 @@ int dce_client_ipc_wait(struct tegra_dce *d, u32 int_type)
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}
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retry_wait:
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ret = dce_wait_cond_wait_interruptible(d, &cl->recv_wait, true, 0);
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ret = dce_wait_cond_wait_interruptible(d, &cl->recv_wait, true, DCE_IPC_TIMEOUT_MS_MAX);
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if (ret) {
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if (ret == -ERESTARTSYS) { /* Interrupt. */
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dce_os_debug(d, "Client [%u] wait interrupted: retrying.", type);
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@@ -114,6 +114,14 @@
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#define DCE_WAIT_LOG 4
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#define DCE_MAX_WAIT 5
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/**
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* DCE IPC timeout values.
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* This is for avoiding kernel lockup due to infinite wait on ipc channel.
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* Max SHA calculation time is 2sec upon SC7 entry request.
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* Host wait time must be larger than this.
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*/
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#define DCE_IPC_TIMEOUT_MS_MAX 10000 /* Max timeout, 10 seconds */
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struct tegra_dce;
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/**
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@@ -32,8 +32,8 @@ struct dce_os_cond {
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condition, msecs_to_jiffies(timeout_ms)); \
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if (_ret == 0) \
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ret = -ETIMEDOUT; \
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else if (_ret == -ERESTARTSYS) \
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ret = -ERESTARTSYS; \
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else if (_ret < 0) \
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ret = _ret; \
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} else { \
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ret = wait_event_interruptible((c)->wq, condition); \
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} \
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