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csi5: add lane polarity config

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parse the lane polarity config from the DTB and
program the nvcsi brick config accordingly.

bug 3865161

Change-Id: I70f746a40033bafa7d9286790b9c01ae5986a9f8
Signed-off-by: Anubhav Rai <arai@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2855412
(cherry picked from commit bee21e4c839b8c55ac6314fd55f2e36edd547c97)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2953780
Reviewed-by: Ankur Pawar <ankurp@nvidia.com>
Reviewed-by: Praveen AC <pac@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Semi Malinen <smalinen@nvidia.com>
Tested-by: Ankur Pawar <ankurp@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Anubhav Rai
2022-11-30 06:26:23 +00:00
committed by mobile promotions
parent 1c2599bcba
commit 33f74c0dd8
3 changed files with 40 additions and 7 deletions
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5
include/media/tegra-v4l2-camera.h
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@@ -1,8 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* TEGRA_V4L2_CAMERA.h - utilities for tegra camera driver
* tegra-v4l2-camera.h - utilities for tegra camera driver
*
* Copyright (c) 2017-2022, NVIDIA Corporation. All rights reserved.
* Copyright (c) 2017-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
*/
#ifndef __TEGRA_V4L2_CAMERA__
@@ -95,6 +95,7 @@ struct sensor_signal_properties {
__u32 mclk_freq;
union __u64val pixel_clock;
__u32 cil_settletime;
__u32 lane_polarity;
__u32 discontinuous_clk;
__u32 dpcm_enable;
__u32 tegra_sinterface;