diff --git a/sound/soc/tegra-alt/tegra186_arad_alt.c b/sound/soc/tegra-alt/tegra186_arad_alt.c
index 1326ac5e..69fb6e60 100644
--- a/sound/soc/tegra-alt/tegra186_arad_alt.c
+++ b/sound/soc/tegra-alt/tegra186_arad_alt.c
@@ -808,12 +808,16 @@ static int tegra186_arad_platform_probe(struct platform_device *pdev)
 		ret = -ENODEV;
 		goto err;
 	}
+	tegra186_arad_runtime_resume(&pdev->dev);
 
 	pm_runtime_enable(&pdev->dev);
-	if (!pm_runtime_enabled(&pdev->dev)) {
-		ret = tegra186_arad_runtime_resume(&pdev->dev);
-		if (ret)
-			goto err_pm_disable;
+
+	ret = snd_soc_register_codec(&pdev->dev, &tegra186_arad_codec,
+				     tegra186_arad_dais,
+				     ARRAY_SIZE(tegra186_arad_dais));
+	if (ret != 0) {
+		dev_err(&pdev->dev, "Could not register CODEC: %d\n", ret);
+		goto err_suspend;
 	}
 
 #ifdef CONFIG_SND_SOC_TEGRA186_ARAD_WAR
@@ -826,14 +830,6 @@ static int tegra186_arad_platform_probe(struct platform_device *pdev)
 		dev_err(&pdev->dev, "Could not register ARAD INTERRUPT\n");
 	spin_lock_init(&arad->int_lock);
 #endif
-	ret = snd_soc_register_codec(&pdev->dev, &tegra186_arad_codec,
-				     tegra186_arad_dais,
-				     ARRAY_SIZE(tegra186_arad_dais));
-	if (ret != 0) {
-		dev_err(&pdev->dev, "Could not register CODEC: %d\n", ret);
-		goto err_suspend;
-	}
-
 	return 0;
 
 err_suspend:
diff --git a/sound/soc/tegra-alt/tegra186_asrc_alt.c b/sound/soc/tegra-alt/tegra186_asrc_alt.c
index 02aa6704..d0a78e6b 100644
--- a/sound/soc/tegra-alt/tegra186_asrc_alt.c
+++ b/sound/soc/tegra-alt/tegra186_asrc_alt.c
@@ -209,6 +209,8 @@ static int tegra186_asrc_runtime_resume(struct device *dev)
 	regcache_cache_only(asrc->regmap, false);
 	regcache_sync(asrc->regmap);
 
+	regmap_write(asrc->regmap, TEGRA186_ASRC_GLOBAL_INT_CLEAR,
+		0x01);
 	for (lane_id = 0; lane_id < 6; lane_id++) {
 		if (asrc->lane[lane_id].ratio_source == RATIO_SW) {
 			regmap_write(asrc->regmap,
@@ -619,37 +621,37 @@ static const struct snd_kcontrol_new tegra186_asrc_controls[] = {
 		0, TEGRA186_ASRC_STREAM_RATIO_INTEGER_PART_MASK, 0,
 		tegra186_asrc_get_ratio_int, tegra186_asrc_put_ratio_int),
 	SOC_SINGLE_EXT("Ratio1 Frac", TEGRA186_ASRC_STREAM1_RATIO_FRAC_PART,
-		0, TEGRA186_ASRC_STREAM_RATIO_FRAC_PART_MASK, 0,
+		0, TEGRA186_ASRC_STREAM_RATIO_FRAC_PART_MAX, 0,
 		tegra186_asrc_get_ratio_frac, tegra186_asrc_put_ratio_frac),
 	SOC_SINGLE_EXT("Ratio2 Int", TEGRA186_ASRC_STREAM2_RATIO_INTEGER_PART,
 		0, TEGRA186_ASRC_STREAM_RATIO_INTEGER_PART_MASK, 0,
 		tegra186_asrc_get_ratio_int, tegra186_asrc_put_ratio_int),
 	SOC_SINGLE_EXT("Ratio2 Frac", TEGRA186_ASRC_STREAM2_RATIO_FRAC_PART,
-		0, TEGRA186_ASRC_STREAM_RATIO_FRAC_PART_MASK, 0,
+		0, TEGRA186_ASRC_STREAM_RATIO_FRAC_PART_MAX, 0,
 		tegra186_asrc_get_ratio_frac, tegra186_asrc_put_ratio_frac),
 	SOC_SINGLE_EXT("Ratio3 Int", TEGRA186_ASRC_STREAM3_RATIO_INTEGER_PART,
 		0, TEGRA186_ASRC_STREAM_RATIO_INTEGER_PART_MASK, 0,
 		tegra186_asrc_get_ratio_int, tegra186_asrc_put_ratio_int),
 	SOC_SINGLE_EXT("Ratio3 Frac", TEGRA186_ASRC_STREAM3_RATIO_FRAC_PART,
-		0, TEGRA186_ASRC_STREAM_RATIO_FRAC_PART_MASK, 0,
+		0, TEGRA186_ASRC_STREAM_RATIO_FRAC_PART_MAX, 0,
 		tegra186_asrc_get_ratio_frac, tegra186_asrc_put_ratio_frac),
 	SOC_SINGLE_EXT("Ratio4 Int", TEGRA186_ASRC_STREAM4_RATIO_INTEGER_PART,
 		0, TEGRA186_ASRC_STREAM_RATIO_INTEGER_PART_MASK, 0,
 		tegra186_asrc_get_ratio_int, tegra186_asrc_put_ratio_int),
 	SOC_SINGLE_EXT("Ratio4 Frac", TEGRA186_ASRC_STREAM4_RATIO_FRAC_PART,
-		0, TEGRA186_ASRC_STREAM_RATIO_FRAC_PART_MASK, 0,
+		0, TEGRA186_ASRC_STREAM_RATIO_FRAC_PART_MAX, 0,
 		tegra186_asrc_get_ratio_frac, tegra186_asrc_put_ratio_frac),
 	SOC_SINGLE_EXT("Ratio5 Int", TEGRA186_ASRC_STREAM5_RATIO_INTEGER_PART,
 		0, TEGRA186_ASRC_STREAM_RATIO_INTEGER_PART_MASK, 0,
 		tegra186_asrc_get_ratio_int, tegra186_asrc_put_ratio_int),
 	SOC_SINGLE_EXT("Ratio5 Frac", TEGRA186_ASRC_STREAM5_RATIO_FRAC_PART,
-		0, TEGRA186_ASRC_STREAM_RATIO_FRAC_PART_MASK, 0,
+		0, TEGRA186_ASRC_STREAM_RATIO_FRAC_PART_MAX, 0,
 		tegra186_asrc_get_ratio_frac, tegra186_asrc_put_ratio_frac),
 	SOC_SINGLE_EXT("Ratio6 Int", TEGRA186_ASRC_STREAM6_RATIO_INTEGER_PART,
 		0, TEGRA186_ASRC_STREAM_RATIO_INTEGER_PART_MASK, 0,
 		tegra186_asrc_get_ratio_int, tegra186_asrc_put_ratio_int),
 	SOC_SINGLE_EXT("Ratio6 Frac", TEGRA186_ASRC_STREAM6_RATIO_FRAC_PART,
-		0, TEGRA186_ASRC_STREAM_RATIO_FRAC_PART_MASK, 0,
+		0, TEGRA186_ASRC_STREAM_RATIO_FRAC_PART_MAX, 0,
 		tegra186_asrc_get_ratio_frac, tegra186_asrc_put_ratio_frac),
 
 	SOC_ENUM_EXT("Ratio1 SRC", src_select1,
@@ -945,11 +947,7 @@ static int tegra186_asrc_platform_probe(struct platform_device *pdev)
 	}
 
 	pm_runtime_enable(&pdev->dev);
-	if (!pm_runtime_enabled(&pdev->dev)) {
-		ret = tegra186_asrc_runtime_resume(&pdev->dev);
-		if (ret)
-			goto err_pm_disable;
-	}
+	tegra186_asrc_runtime_resume(&pdev->dev);
 
 	regmap_write(asrc->regmap, TEGRA186_ASRC_GLOBAL_CONFIG,
 		TEGRA186_ASRC_GLOBAL_CONFIG_FRAC_32BIT_PRECISION);
@@ -959,10 +957,11 @@ static int tegra186_asrc_platform_probe(struct platform_device *pdev)
 		TEGRA186_ASRC_GLOBAL_SCRATCH_ADDR,
 		ASRC_ARAM_START_ADDR);
 
+	regmap_write(asrc->regmap, TEGRA186_ASRC_GLOBAL_INT_MASK,
+		0x01);
 	/* set global enable */
 	regmap_write(asrc->regmap,
 		TEGRA186_ASRC_GLOBAL_ENB, TEGRA186_ASRC_GLOBAL_EN);
-
 	/* initialize default output srate */
 	for (i = 0; i < 6; i++) {
 		asrc->lane[i].int_part = 1;