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drm/tegra: Add trace support

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Add trace support for the Tegra DRM driver by pulling in the relevant
changes from the upstream Tegra DRM driver.

Bug 3724727

Change-Id: Id34df005df76a27120282790a53c09c71361cec2
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2739540
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
This commit is contained in:
Jon Hunter
2022-07-01 11:08:58 +01:00
committed by Laxman Dewangan
parent 1980c277ea
commit 38c4f3bbd5
9 changed files with 89 additions and 0 deletions
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2
drivers/gpu/drm/tegra/Makefile
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@@ -34,4 +34,6 @@ tegra-drm-next-y := \
nvenc.o \ nvenc.o \
nvjpg.o nvjpg.o
tegra-drm-next-y += trace.o
obj-m := tegra-drm-next.o obj-m := tegra-drm-next.o

3
drivers/gpu/drm/tegra/dc.h
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@@ -122,6 +122,7 @@ static inline struct tegra_dc *to_tegra_dc(struct drm_crtc *crtc)
static inline void tegra_dc_writel(struct tegra_dc *dc, u32 value, static inline void tegra_dc_writel(struct tegra_dc *dc, u32 value,
unsigned int offset) unsigned int offset)
{ {
trace_dc_writel(dc->dev, offset, value);
writel(value, dc->regs + (offset << 2)); writel(value, dc->regs + (offset << 2));
} }
@@ -129,6 +130,8 @@ static inline u32 tegra_dc_readl(struct tegra_dc *dc, unsigned int offset)
{ {
u32 value = readl(dc->regs + (offset << 2)); u32 value = readl(dc->regs + (offset << 2));
trace_dc_readl(dc->dev, offset, value);
return value; return value;
} }

3
drivers/gpu/drm/tegra/dpaux.c
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@@ -83,12 +83,15 @@ static inline u32 tegra_dpaux_readl(struct tegra_dpaux *dpaux,
{ {
u32 value = readl(dpaux->regs + (offset << 2)); u32 value = readl(dpaux->regs + (offset << 2));
trace_dpaux_readl(dpaux->dev, offset, value);
return value; return value;
} }
static inline void tegra_dpaux_writel(struct tegra_dpaux *dpaux, static inline void tegra_dpaux_writel(struct tegra_dpaux *dpaux,
u32 value, unsigned int offset) u32 value, unsigned int offset)
{ {
trace_dpaux_writel(dpaux->dev, offset, value);
writel(value, dpaux->regs + (offset << 2)); writel(value, dpaux->regs + (offset << 2));
} }

1
drivers/gpu/drm/tegra/drm.h
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@@ -22,6 +22,7 @@
#include "gem.h" #include "gem.h"
#include "hub.h" #include "hub.h"
#include <trace/events/trace.h>
/* XXX move to include/uapi/drm/drm_fourcc.h? */ /* XXX move to include/uapi/drm/drm_fourcc.h? */
#define DRM_FORMAT_MOD_NVIDIA_SECTOR_LAYOUT BIT_ULL(22) #define DRM_FORMAT_MOD_NVIDIA_SECTOR_LAYOUT BIT_ULL(22)

4
drivers/gpu/drm/tegra/dsi.c
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@@ -28,6 +28,7 @@
#include "drm.h" #include "drm.h"
#include "dsi.h" #include "dsi.h"
#include "mipi-phy.h" #include "mipi-phy.h"
#include <trace/events/trace.h>
struct tegra_dsi_state { struct tegra_dsi_state {
struct drm_connector_state base; struct drm_connector_state base;
@@ -107,12 +108,15 @@ static inline u32 tegra_dsi_readl(struct tegra_dsi *dsi, unsigned int offset)
{ {
u32 value = readl(dsi->regs + (offset << 2)); u32 value = readl(dsi->regs + (offset << 2));
trace_dsi_readl(dsi->dev, offset, value);
return value; return value;
} }
static inline void tegra_dsi_writel(struct tegra_dsi *dsi, u32 value, static inline void tegra_dsi_writel(struct tegra_dsi *dsi, u32 value,
unsigned int offset) unsigned int offset)
{ {
trace_dsi_writel(dsi->dev, offset, value);
writel(value, dsi->regs + (offset << 2)); writel(value, dsi->regs + (offset << 2));
} }

4
drivers/gpu/drm/tegra/hdmi.c
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@@ -27,6 +27,7 @@
#include "hdmi.h" #include "hdmi.h"
#include "drm.h" #include "drm.h"
#include "dc.h" #include "dc.h"
#include <trace/events/trace.h>
#define HDMI_ELD_BUFFER_SIZE 96 #define HDMI_ELD_BUFFER_SIZE 96
@@ -104,12 +105,15 @@ static inline u32 tegra_hdmi_readl(struct tegra_hdmi *hdmi,
{ {
u32 value = readl(hdmi->regs + (offset << 2)); u32 value = readl(hdmi->regs + (offset << 2));
trace_hdmi_readl(hdmi->dev, offset, value);
return value; return value;
} }
static inline void tegra_hdmi_writel(struct tegra_hdmi *hdmi, u32 value, static inline void tegra_hdmi_writel(struct tegra_hdmi *hdmi, u32 value,
unsigned int offset) unsigned int offset)
{ {
trace_hdmi_writel(hdmi->dev, offset, value);
writel(value, hdmi->regs + (offset << 2)); writel(value, hdmi->regs + (offset << 2));
} }

66
drivers/gpu/drm/tegra/include/trace/events/trace.h Normal file
View File

@@ -0,0 +1,66 @@
#undef TRACE_SYSTEM
#define TRACE_SYSTEM tegra
#if !defined(DRM_TEGRA_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)
#define DRM_TEGRA_TRACE_H 1
#include <linux/device.h>
#include <linux/tracepoint.h>
DECLARE_EVENT_CLASS(register_access,
TP_PROTO(struct device *dev, unsigned int offset, u32 value),
TP_ARGS(dev, offset, value),
TP_STRUCT__entry(
__field(struct device *, dev)
__field(unsigned int, offset)
__field(u32, value)
),
TP_fast_assign(
__entry->dev = dev;
__entry->offset = offset;
__entry->value = value;
),
TP_printk("%s %04x %08x", dev_name(__entry->dev), __entry->offset,
__entry->value)
);
DEFINE_EVENT(register_access, dc_writel,
TP_PROTO(struct device *dev, unsigned int offset, u32 value),
TP_ARGS(dev, offset, value));
DEFINE_EVENT(register_access, dc_readl,
TP_PROTO(struct device *dev, unsigned int offset, u32 value),
TP_ARGS(dev, offset, value));
DEFINE_EVENT(register_access, hdmi_writel,
TP_PROTO(struct device *dev, unsigned int offset, u32 value),
TP_ARGS(dev, offset, value));
DEFINE_EVENT(register_access, hdmi_readl,
TP_PROTO(struct device *dev, unsigned int offset, u32 value),
TP_ARGS(dev, offset, value));
DEFINE_EVENT(register_access, dsi_writel,
TP_PROTO(struct device *dev, unsigned int offset, u32 value),
TP_ARGS(dev, offset, value));
DEFINE_EVENT(register_access, dsi_readl,
TP_PROTO(struct device *dev, unsigned int offset, u32 value),
TP_ARGS(dev, offset, value));
DEFINE_EVENT(register_access, dpaux_writel,
TP_PROTO(struct device *dev, unsigned int offset, u32 value),
TP_ARGS(dev, offset, value));
DEFINE_EVENT(register_access, dpaux_readl,
TP_PROTO(struct device *dev, unsigned int offset, u32 value),
TP_ARGS(dev, offset, value));
DEFINE_EVENT(register_access, sor_writel,
TP_PROTO(struct device *dev, unsigned int offset, u32 value),
TP_ARGS(dev, offset, value));
DEFINE_EVENT(register_access, sor_readl,
TP_PROTO(struct device *dev, unsigned int offset, u32 value),
TP_ARGS(dev, offset, value));
#endif /* DRM_TEGRA_TRACE_H */
/* This part must be outside protection */
#define TRACE_INCLUDE_FILE trace
#include <trace/define_trace.h>

4
drivers/gpu/drm/tegra/sor.c
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@@ -40,6 +40,7 @@
#include "drm.h" #include "drm.h"
#include "hda.h" #include "hda.h"
#include "sor.h" #include "sor.h"
#include <trace/events/trace.h>
#define SOR_REKEY 0x38 #define SOR_REKEY 0x38
@@ -495,12 +496,15 @@ static inline u32 tegra_sor_readl(struct tegra_sor *sor, unsigned int offset)
{ {
u32 value = readl(sor->regs + (offset << 2)); u32 value = readl(sor->regs + (offset << 2));
trace_sor_readl(sor->dev, offset, value);
return value; return value;
} }
static inline void tegra_sor_writel(struct tegra_sor *sor, u32 value, static inline void tegra_sor_writel(struct tegra_sor *sor, u32 value,
unsigned int offset) unsigned int offset)
{ {
trace_sor_writel(sor->dev, offset, value);
writel(value, sor->regs + (offset << 2)); writel(value, sor->regs + (offset << 2));
} }

2
drivers/gpu/drm/tegra/trace.c Normal file
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@@ -0,0 +1,2 @@
#define CREATE_TRACE_POINTS
#include <trace/events/trace.h>