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pwm: Add pwm based Tegra tachometer
Add PWM based NVIDIA tegra tachometer which capture the pwm and reports the speed. Bug 3621819 Change-Id: I1b5a9d326ce8452d2a4fb41e41d5e79d8f1cb8e8 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2703760 GVS: Gerrit_Virtual_Submit
This commit is contained in:
Laxman Dewangan
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commit
3a5b645b03
@@ -5,6 +5,7 @@ LINUXINCLUDE += -I$(srctree.nvidia-oot)/include
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obj-m += hwmon/
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obj-m += mfd/
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obj-m += pwm/
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obj-m += thermal/
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obj-m += watchdog/
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4
drivers/pwm/Makefile
Normal file
4
drivers/pwm/Makefile
Normal file
@@ -0,0 +1,4 @@
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# SPDX-License-Identifier: GPL-2.0
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# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved.
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obj-m += pwm-tegra-tachometer.o
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502
drivers/pwm/pwm-tegra-tachometer.c
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502
drivers/pwm/pwm-tegra-tachometer.c
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@@ -0,0 +1,502 @@
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// SPDX-License-Identifier: GPL-2.0
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// Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved.
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/clk.h>
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#include <linux/platform_device.h>
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#include <linux/err.h>
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#include <linux/pwm.h>
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#include <linux/interrupt.h>
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#include <linux/slab.h>
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#include <linux/reset.h>
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#include <linux/of_device.h>
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#include <linux/io.h>
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#define DRIVER_NAME "pwm-tach"
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/* Since oscillator clock (38.4MHz) serves as a clock source for
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* the tach input controller, 1.0105263MHz (i.e. 38.4/38) has to be
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* used as a clock value in the RPM calculations
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*/
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#define TACH_COUNTER_CLK 1010526
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#define TACH_FAN_TACH0 0x0
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#define TACH_FAN_TACH0_PERIOD_MASK 0x7FFFF
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#define TACH_FAN_TACH0_PERIOD_MAX 0x7FFFF
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#define TACH_FAN_TACH0_PERIOD_MIN 0x0
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#define TACH_FAN_TACH0_WIN_LENGTH_SHIFT 25
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#define TACH_FAN_TACH0_WIN_LENGTH_MASK 0x3
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#define TACH_FAN_TACH0_OVERFLOW_MASK BIT(24)
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#define TACH_FAN_TACH1 0x4
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#define TACH_FAN_TACH1_HI_MASK 0x7FFFF
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#define TACH_FAN_TACH_UPPER_THRESHOLD_0 0x8
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#define TACH_UPPER_THRESHOLD_MASK 0xffffff
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#define TACH_UPPER_THRESHOLD_SHIFT 0
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#define TACH_FAN_TACH_LOWER_THRESHOLD_0 0xc
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#define TACH_LOWER_THRESHOLD_MASK 0xffffff
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#define TACH_LOWER_THRESHOLD_SHIFT 0
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#define DEFAULT_UPPER_THRESHOLD 4
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#define DEFAULT_LOWER_THRESHOLD 1
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#define TACH_FAN_TACH_INTERRUPT_ENABLE_0 0x10
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#define TACH_FAN_TACH_INTR_OVERRUN BIT(0)
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#define TACH_FAN_TACH_INTR_UNDERRUN BIT(1)
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#define TACH_FAN_TACH_INTR_CNT_OVERFLOW BIT(2)
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#define TACH_FAN_ENABLE_INTERRUPT_VAL (TACH_FAN_TACH_INTR_OVERRUN | \
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TACH_FAN_TACH_INTR_UNDERRUN | \
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TACH_FAN_TACH_INTR_CNT_OVERFLOW)
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#define TACH_FAN_ENABLE_INTERRUPT_MASK 0x7
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#define TACH_FAN_ENABLE_INTERRUPT_SHIFT 0
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#define TACH_FAN_TACH_INTERRUPT_DISABLE 0x0
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#define TACH_FAN_TACH_CONTROL_0 0x14
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#define TACH_FAN_LOAD_CONFIG BIT(0)
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#define TACH_FAN_STOP_ON_ERR BIT(1)
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#define TACH_FAN_ERR_CONFIG BIT(2)
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#define TACH_FAN_MONITOR_TIME_MASK 0xffffff00
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#define TACH_FAN_TACH_CONTROL_0_MASK 1
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#define TACH_FAN_TACH_CONTROL_0_SHIFT 0
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#define TACH_ERR_CONFIG_MONITOR_PERIOD_VAL 1
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#define TACH_ERR_CONFIG_MONITOR_PULSES_VAL 1
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#define TACH_FAN_TACH_ERR_STATUS_0 0x18
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#define TACH_FAN_ERR_OVERRUN BIT(0)
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#define TACH_FAN_ERR_UNDERRUN BIT(1)
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#define TACH_FAN_ERR_MASK 0x3
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#define TACH_FAN_ERR_PERIOD_MASK 0xFFFFFF00
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#define TACH_FAN_ERR_PERIOD_SHIFT 0x8
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#define TACH_FAN_INTERRUPT_ENABLE 0x1
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struct pwm_tegra_tach_soc_data {
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bool has_interrupt_support;
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};
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struct pwm_tegra_tach {
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struct device *dev;
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void __iomem *regs;
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struct clk *clk;
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struct reset_control *rst;
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unsigned int pulse_per_rev;
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int irq;
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unsigned int capture_win_len;
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unsigned int upper_threshold;
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unsigned int lower_threshold;
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struct pwm_chip chip;
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const struct pwm_tegra_tach_soc_data *soc_data;
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};
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static struct pwm_tegra_tach *to_tegra_pwm_chip(struct pwm_chip *chip)
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{
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return container_of(chip, struct pwm_tegra_tach, chip);
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}
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static u32 tachometer_readl(struct pwm_tegra_tach *ptt, unsigned long reg)
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{
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return readl(ptt->regs + reg);
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}
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static inline void tachometer_writel(struct pwm_tegra_tach *ptt, u32 val,
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unsigned long reg)
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{
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writel(val, ptt->regs + reg);
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}
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static int tegra_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
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int duty_ns, int period_ns)
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{
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/* Dummy implementation for avoiding error from core */
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return 0;
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}
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static int tegra_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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/* Dummy implementation for avoiding error from core */
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return 0;
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}
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static void tegra_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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/* Dummy implementation for avoiding error from core */
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}
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static inline void tach_update_mask(struct pwm_tegra_tach *ptt,
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u32 val, u32 reg_offset, u32 mask,
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u32 bit_offset)
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{
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u32 update_val;
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update_val = tachometer_readl(ptt, reg_offset);
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update_val = ((update_val & (~mask)) | (val << bit_offset));
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tachometer_writel(ptt, update_val, reg_offset);
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}
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static int pwm_tegra_tacho_set_wlen(struct pwm_tegra_tach *ptt,
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int window_length)
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{
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u32 tach0, wlen;
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wlen = ffs(window_length) - 1;
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tach0 = tachometer_readl(ptt, TACH_FAN_TACH0);
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tach0 &= ~(TACH_FAN_TACH0_WIN_LENGTH_MASK <<
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TACH_FAN_TACH0_WIN_LENGTH_SHIFT);
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tach0 |= wlen << TACH_FAN_TACH0_WIN_LENGTH_SHIFT;
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tachometer_writel(ptt, tach0, TACH_FAN_TACH0);
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return 0;
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}
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static int pwm_tegra_tacho_set_capture_wlen(struct pwm_chip *chip,
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struct pwm_device *pwm,
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int window_length)
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{
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struct pwm_tegra_tach *ptt = to_tegra_pwm_chip(chip);
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if (hweight8(window_length) != 1) {
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dev_err(ptt->dev,
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"Invalid window length,valid values {1, 2, 4 or 8}\n");
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return -EINVAL;
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}
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if (ptt->pulse_per_rev > window_length) {
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dev_err(ptt->dev, "Window length must be pulse per rev (%d)\n",
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ptt->pulse_per_rev);
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return -EINVAL;
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}
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pwm_tegra_tacho_set_wlen(ptt, window_length);
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ptt->capture_win_len = window_length;
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return 0;
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}
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static void pwm_tegra_tacho_set_threshold(struct pwm_chip *chip)
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{
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struct pwm_tegra_tach *ptt = to_tegra_pwm_chip(chip);
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tach_update_mask(ptt, ptt->upper_threshold,
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TACH_FAN_TACH_UPPER_THRESHOLD_0,
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TACH_UPPER_THRESHOLD_MASK,
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TACH_UPPER_THRESHOLD_SHIFT);
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tach_update_mask(ptt, ptt->lower_threshold,
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TACH_FAN_TACH_LOWER_THRESHOLD_0,
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TACH_LOWER_THRESHOLD_MASK,
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TACH_LOWER_THRESHOLD_SHIFT);
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}
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static int pwm_tegra_tacho_capture(struct pwm_chip *chip,
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struct pwm_device *pwm,
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struct pwm_capture *result,
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unsigned long timeout)
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{
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struct pwm_tegra_tach *ptt = to_tegra_pwm_chip(chip);
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unsigned long period;
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u32 tach0;
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tach0 = tachometer_readl(ptt, TACH_FAN_TACH1);
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result->duty_cycle = (tach0 & TACH_FAN_TACH1_HI_MASK);
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tach0 = tachometer_readl(ptt, TACH_FAN_TACH0);
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if (tach0 & TACH_FAN_TACH0_OVERFLOW_MASK) {
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/* Fan is stalled, clear overflow state by writing 1 */
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dev_info(ptt->dev, "Tachometer Overflow is detected\n");
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tachometer_writel(ptt, tach0, TACH_FAN_TACH0);
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}
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period = tach0 & TACH_FAN_TACH0_PERIOD_MASK;
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if ((period == TACH_FAN_TACH0_PERIOD_MIN) ||
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(period == TACH_FAN_TACH0_PERIOD_MAX)) {
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dev_dbg(ptt->dev, "Period set to min/max (0x%lx), Invalid RPM\n",
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period);
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result->period = 0;
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result->duty_cycle = 0;
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return 0;
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}
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period = period + 1; /* Bug 200046190 */
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period = DIV_ROUND_CLOSEST_ULL(period * ptt->pulse_per_rev * 1000000ULL,
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ptt->capture_win_len * TACH_COUNTER_CLK);
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/*
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* period & duty cycles are in units of micro seconds. Hence,
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* convert them into nano seconds and store it in result.
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*/
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result->period = period * 1000;
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result->duty_cycle = result->duty_cycle * 1000;
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return 0;
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}
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static irqreturn_t tegra_pwm_tach_irq(int irq, void *dev)
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{
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struct pwm_tegra_tach *ptt = dev;
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u32 tach0, period_val;
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/* Read tachometer error status reg to know the status of error */
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tach0 = tachometer_readl(ptt, TACH_FAN_TACH_ERR_STATUS_0);
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/* Clear Interrupts */
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tachometer_writel(ptt, TACH_FAN_ERR_MASK, TACH_FAN_TACH_ERR_STATUS_0);
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/* Disable Interrupt */
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tachometer_writel(ptt, TACH_FAN_TACH_INTERRUPT_DISABLE, TACH_FAN_TACH_INTERRUPT_ENABLE_0);
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/* Get period value captured by TACH controller when the err occurred */
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period_val = (tach0 >> TACH_FAN_ERR_PERIOD_SHIFT);
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if (tach0 & TACH_FAN_ERR_OVERRUN)
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dev_err(ptt->dev, "Tach overrun error. Period value: 0x%x\n",
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period_val);
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if (tach0 & TACH_FAN_ERR_UNDERRUN)
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dev_err(ptt->dev, "Tach underrun error. Period value: 0x%x\n",
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period_val);
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return IRQ_HANDLED;
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}
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static const struct pwm_ops pwm_tegra_tach_ops = {
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.config = tegra_pwm_config,
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.enable = tegra_pwm_enable,
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.disable = tegra_pwm_disable,
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.capture = pwm_tegra_tacho_capture,
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.owner = THIS_MODULE,
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};
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static void pwm_tegra_tach_read_platform_data(struct pwm_tegra_tach *ptt)
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{
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struct device_node *np = ptt->dev->of_node;
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u32 pval;
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int ret;
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ret = of_property_read_u32(np, "pulse-per-rev", &pval);
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if (!ret)
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ptt->pulse_per_rev = pval;
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ret = of_property_read_u32(np, "capture-window-length", &pval);
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if (!ret)
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ptt->capture_win_len = pval;
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if (ptt->soc_data->has_interrupt_support) {
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/* get the threshold values only in case of t234 based on chipdata */
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ret = of_property_read_u32(np, "upper-threshold", &pval);
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ptt->upper_threshold = (ret == 0) ? pval : DEFAULT_UPPER_THRESHOLD;
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ret = of_property_read_u32(np, "lower-threshold", &pval);
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ptt->lower_threshold = (ret == 0) ? pval : DEFAULT_LOWER_THRESHOLD;
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}
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}
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static int pwm_tegra_tach_probe(struct platform_device *pdev)
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{
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struct pwm_tegra_tach *ptt;
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struct pwm_device *pwm;
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struct resource *r;
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int ret;
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ptt = devm_kzalloc(&pdev->dev, sizeof(*ptt), GFP_KERNEL);
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if (!ptt)
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return -ENOMEM;
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ptt->dev = &pdev->dev;
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ptt->soc_data = of_device_get_match_data(&pdev->dev);
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if (!ptt->soc_data) {
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dev_err(&pdev->dev, "unsupported tegra\n");
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return -ENODEV;
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}
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pwm_tegra_tach_read_platform_data(ptt);
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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ptt->regs = devm_ioremap_resource(&pdev->dev, r);
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if (IS_ERR(ptt->regs))
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return PTR_ERR(ptt->regs);
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platform_set_drvdata(pdev, ptt);
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ptt->clk = devm_clk_get(&pdev->dev, "tach");
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if (IS_ERR(ptt->clk)) {
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ret = PTR_ERR(ptt->clk);
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if (ret != -EPROBE_DEFER) {
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dev_err(&pdev->dev,
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"Tachometer clock get failed: %d\n", ret);
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}
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return PTR_ERR(ptt->clk);
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}
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ptt->rst = devm_reset_control_get(&pdev->dev, "tach");
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if (IS_ERR(ptt->rst)) {
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ret = PTR_ERR(ptt->rst);
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dev_err(&pdev->dev, "Reset control is not found: %d\n", ret);
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return ret;
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}
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ret = clk_prepare_enable(ptt->clk);
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if (ret) {
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dev_err(&pdev->dev, "Failed to prepare clock: %d\n", ret);
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return ret;
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}
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ret = clk_set_rate(ptt->clk, TACH_COUNTER_CLK);
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if (ret < 0) {
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dev_err(&pdev->dev, "Failed to set clock rate %d: %d\n",
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TACH_COUNTER_CLK, ret);
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goto clk_unprep;
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}
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reset_control_reset(ptt->rst);
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if (ptt->soc_data->has_interrupt_support) {
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ptt->irq = platform_get_irq(pdev, 0);
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if (ptt->irq < 0) {
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dev_err(&pdev->dev, "platform_get_irq failed\n");
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goto clk_unprep;
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}
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ret = devm_request_irq(&pdev->dev, ptt->irq, tegra_pwm_tach_irq, 0,
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DRIVER_NAME, ptt);
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if (ret) {
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dev_err(&pdev->dev, "request_irq failed - irq[%d] err[%d]\n",
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ptt->irq, ret);
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goto clk_unprep;
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}
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}
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ptt->chip.dev = &pdev->dev;
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ptt->chip.ops = &pwm_tegra_tach_ops;
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ptt->chip.base = -1;
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ptt->chip.npwm = 1;
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ret = pwmchip_add(&ptt->chip);
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if (ret < 0) {
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dev_err(&pdev->dev, "Failed to add tachometer PWM: %d\n", ret);
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goto reset_assert;
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}
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/* As per spec, the WIN_LENGTH value should be greater than or equal to
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* Pulse Per Revolution Value to measure the accurate time period values
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*/
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pwm = &ptt->chip.pwms[0];
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if (ptt->pulse_per_rev > ptt->capture_win_len)
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ptt->capture_win_len = ptt->pulse_per_rev;
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ret = pwm_tegra_tacho_set_capture_wlen(&ptt->chip, pwm, ptt->capture_win_len);
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if (ret < 0) {
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dev_err(ptt->dev, "Failed to set window length: %d\n", ret);
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goto pwm_remove;
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}
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if (ptt->soc_data->has_interrupt_support) {
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/* set upper and lower threshold values */
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pwm_tegra_tacho_set_threshold(&ptt->chip);
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/* program tach fan control reg */
|
||||
tach_update_mask(ptt, TACH_ERR_CONFIG_MONITOR_PERIOD_VAL,
|
||||
TACH_FAN_TACH_CONTROL_0,
|
||||
TACH_FAN_TACH_CONTROL_0_MASK,
|
||||
TACH_FAN_TACH_CONTROL_0_SHIFT);
|
||||
|
||||
/* enable interrupts in interrupt enable register */
|
||||
tach_update_mask(ptt, TACH_FAN_ENABLE_INTERRUPT_VAL,
|
||||
TACH_FAN_TACH_INTERRUPT_ENABLE_0,
|
||||
TACH_FAN_ENABLE_INTERRUPT_MASK,
|
||||
TACH_FAN_ENABLE_INTERRUPT_SHIFT);
|
||||
|
||||
}
|
||||
return 0;
|
||||
|
||||
pwm_remove:
|
||||
pwmchip_remove(&ptt->chip);
|
||||
|
||||
reset_assert:
|
||||
reset_control_assert(ptt->rst);
|
||||
|
||||
clk_unprep:
|
||||
clk_disable_unprepare(ptt->clk);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int pwm_tegra_tach_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct pwm_tegra_tach *ptt = platform_get_drvdata(pdev);
|
||||
|
||||
if (WARN_ON(!ptt))
|
||||
return -ENODEV;
|
||||
|
||||
reset_control_assert(ptt->rst);
|
||||
|
||||
clk_disable_unprepare(ptt->clk);
|
||||
|
||||
pwmchip_remove(&ptt->chip);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int pwm_tegra_tach_suspend(struct device *dev)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int pwm_tegra_tach_resume(struct device *dev)
|
||||
{
|
||||
struct pwm_tegra_tach *ptt = dev_get_drvdata(dev);
|
||||
|
||||
pwm_tegra_tacho_set_wlen(ptt, ptt->capture_win_len);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct dev_pm_ops pwm_tegra_tach_pm_ops = {
|
||||
.suspend = pwm_tegra_tach_suspend,
|
||||
.resume = pwm_tegra_tach_resume,
|
||||
};
|
||||
|
||||
|
||||
static struct pwm_tegra_tach_soc_data tegra186_tach_soc_data = {
|
||||
.has_interrupt_support = false,
|
||||
};
|
||||
|
||||
static struct pwm_tegra_tach_soc_data tegra194_tach_soc_data = {
|
||||
.has_interrupt_support = false,
|
||||
};
|
||||
|
||||
static struct pwm_tegra_tach_soc_data tegra234_tach_soc_data = {
|
||||
.has_interrupt_support = true,
|
||||
};
|
||||
|
||||
static const struct of_device_id pwm_tegra_tach_of_match[] = {
|
||||
{ .compatible = "nvidia,pwm-tegra234-tachometer", .data = &tegra234_tach_soc_data, },
|
||||
{ .compatible = "nvidia,pwm-tegra194-tachometer", .data = &tegra194_tach_soc_data, },
|
||||
{ .compatible = "nvidia,pwm-tegra186-tachometer", .data = &tegra186_tach_soc_data, },
|
||||
{}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, pwm_tegra_tach_of_match);
|
||||
|
||||
static struct platform_driver tegra_tach_driver = {
|
||||
.driver = {
|
||||
.name = "pwm-tegra-tachometer",
|
||||
.of_match_table = pwm_tegra_tach_of_match,
|
||||
.pm = &pwm_tegra_tach_pm_ops,
|
||||
},
|
||||
.probe = pwm_tegra_tach_probe,
|
||||
.remove = pwm_tegra_tach_remove,
|
||||
};
|
||||
|
||||
module_platform_driver(tegra_tach_driver);
|
||||
|
||||
MODULE_DESCRIPTION("PWM based NVIDIA Tegra Tachometer driver");
|
||||
MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
|
||||
MODULE_AUTHOR("R Raj Kumar <rrajk@nvidia.com>");
|
||||
MODULE_AUTHOR("Vishwaroop A <va@nvidia.com>");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
Reference in New Issue
Block a user