From 3b9dbf31067dc99f397f3b246d0491d2859da731 Mon Sep 17 00:00:00 2001 From: spatki Date: Wed, 16 Apr 2025 08:04:37 +0000 Subject: [PATCH] tsec: Changes to the tsec kmd wrt t264 This change makes the following changes to the tsec kmd to get it working on t264. - Add compatible property for t264 - Update dma mask bits for t26x Jira TSEC-14 Change-Id: If9fe7498f38018a2fed461281aa02865e6db5e7d Signed-off-by: spatki Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3341847 GVS: buildbot_gerritrpt Reviewed-by: svcacv Reviewed-by: Nikesh Oswal Reviewed-by: Byungkuk Seo Reviewed-by: Bharat Nihalani --- drivers/video/tegra/tsec/tsec.c | 13 ++++++++++++- drivers/video/tegra/tsec/tsec.h | 5 ++++- 2 files changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/video/tegra/tsec/tsec.c b/drivers/video/tegra/tsec/tsec.c index 06b7c271..f515c77d 100644 --- a/drivers/video/tegra/tsec/tsec.c +++ b/drivers/video/tegra/tsec/tsec.c @@ -20,6 +20,7 @@ static struct tsec_device_data t23x_tsec_data = { .rate = {192000000, 0, 204000000}, .riscv_desc_bin = "tegra23x/nvhost_tsec_desc.fw", .riscv_image_bin = "tegra23x/nvhost_tsec_riscv.fw", + .dma_mask_bits = 39, }; MODULE_FIRMWARE("tegra23x/nvhost_tsec_riscv.fw"); MODULE_FIRMWARE("tegra23x/nvhost_tsec_desc.fw"); @@ -28,6 +29,14 @@ static struct tsec_device_data t239_tsec_data = { .rate = {192000000, 0, 204000000}, .riscv_desc_bin = "tegra239/nvhost_tsec_desc.fw", .riscv_image_bin = "tegra239/nvhost_tsec_riscv.fw", + .dma_mask_bits = 39, +}; + +static struct tsec_device_data t264_tsec_data = { + .rate = {192000000, 0, 204000000}, + .riscv_desc_bin = "tegra264/nvhost_tsec_desc.fw", + .riscv_image_bin = "tegra264/nvhost_tsec_riscv.fw", + .dma_mask_bits = 48, }; /* @@ -317,7 +326,7 @@ static int tsec_module_init(struct platform_device *dev) void __iomem *regs = NULL; /* Initialize dma parameters */ - dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(39)); + dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(pdata->dma_mask_bits)); dev->dev.dma_parms = &pdata->dma_parms; dma_set_max_seg_size(&dev->dev, UINT_MAX); @@ -412,6 +421,8 @@ static const struct of_device_id tsec_of_match[] = { .data = (struct tsec_device_data *)&t23x_tsec_data }, { .compatible = "nvidia,tegra239-tsec", .data = (struct tsec_device_data *)&t239_tsec_data }, + { .compatible = "nvidia,tegra264-tsec", + .data = (struct tsec_device_data *)&t264_tsec_data }, { }, }; diff --git a/drivers/video/tegra/tsec/tsec.h b/drivers/video/tegra/tsec/tsec.h index df1ebdb2..367f6653 100644 --- a/drivers/video/tegra/tsec/tsec.h +++ b/drivers/video/tegra/tsec/tsec.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2022-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * * Tegra TSEC Module Support */ @@ -51,6 +51,9 @@ struct tsec_device_data { #ifdef CONFIG_DEBUG_FS struct dentry *debug_root; #endif /* CONFIG_DEBUG_FS */ + + /* Number of bits for DMA mask - IOVA/PA number of bits */ + u8 dma_mask_bits; }; /*