nvethernet: PHY register read/write for fixed-link case

ethernet@<address> {
    nvidia,mdio_address = <PHY MDIO bus address>;

    fixed-link {
	speed = <1000>;
	full-duplex;
    };
};

1. Added nvidia DT property (nvidia,mdio_address) for passing
   the PHY MDIO bus address.
2. If this property present in DT then driver calls PHY MDIO
   read/write functions directly instead of going through PHY subsystem.
3. If this property is not present – then driver PHY mdio
   read/write goes through PHY subsystem.

Bug 200733774

Change-Id: Ib3a533bd73910f5c95ed0884be28820adf729726
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2567762
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Narayan Reddy
2021-07-30 14:21:38 +05:30
committed by Revanth Kumar Uppala
parent a955fa087a
commit 48e0d60b07
2 changed files with 45 additions and 6 deletions

View File

@@ -3501,6 +3501,7 @@ static int ether_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
{
int ret = -EOPNOTSUPP;
struct ether_priv_data *pdata = netdev_priv(dev);
struct mii_ioctl_data *mii_data = if_mii(rq);
if (!dev || !rq) {
dev_err(pdata->dev, "%s: Invalid arg\n", __func__);
@@ -3514,14 +3515,37 @@ static int ether_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
switch (cmd) {
case SIOCGMIIPHY:
case SIOCGMIIREG:
case SIOCSMIIREG:
if (!dev->phydev) {
return -EINVAL;
if (pdata->mdio_addr != FIXED_PHY_INVALID_MDIO_ADDR) {
mii_data->phy_id = pdata->mdio_addr;
ret = 0;
} else {
if (!dev->phydev) {
return -EINVAL;
}
ret = phy_mii_ioctl(dev->phydev, rq, cmd);
}
break;
/* generic PHY MII ioctl interface */
ret = phy_mii_ioctl(dev->phydev, rq, cmd);
case SIOCGMIIREG:
if (pdata->mdio_addr != FIXED_PHY_INVALID_MDIO_ADDR) {
ret = ether_handle_priv_rmdio_ioctl(pdata, rq);
} else {
if (!dev->phydev) {
return -EINVAL;
}
ret = phy_mii_ioctl(dev->phydev, rq, cmd);
}
break;
case SIOCSMIIREG:
if (pdata->mdio_addr != FIXED_PHY_INVALID_MDIO_ADDR) {
ret = ether_handle_priv_wmdio_ioctl(pdata, rq);
} else {
if (!dev->phydev) {
return -EINVAL;
}
ret = phy_mii_ioctl(dev->phydev, rq, cmd);
}
break;
case SIOCDEVPRIVATE:
@@ -5221,6 +5245,13 @@ static int ether_parse_dt(struct ether_priv_data *pdata)
unsigned int i, mtlq, chan, bitmap;
unsigned int dt_pad_calibration_enable;
/* Read MDIO address */
ret = of_property_read_u32(np, "nvidia,mdio_addr",
&pdata->mdio_addr);
if (ret != 0) {
dev_info(dev, "failed to read MDIO address\n");
pdata->mdio_addr = FIXED_PHY_INVALID_MDIO_ADDR;
}
/* read ptp clock */
ret = of_property_read_u32(np, "nvidia,ptp_ref_clock_speed",
&pdata->ptp_ref_clock_speed);