nvethernet: T26X MAC_Address0_High reg AE bit

In T26X, MAC_Address0_High reg AE bit R/W, so changing
UC and BC address indexing to 0 and 1.

Ported from -
https://git-master.nvidia.com/r/c/nvethernet-docs/+/2987634

Bug 4325242

Change-Id: Id2e6d757ceee750a31bf1fdf3821bc5dd892f08b
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
This commit is contained in:
Rakesh Goyal
2023-09-28 13:05:01 +00:00
committed by Bhadram Varka
parent 62e5a277df
commit 4cd40b0b3b
2 changed files with 16 additions and 4 deletions

View File

@@ -2418,6 +2418,16 @@ static int ether_update_mac_addr_filter(struct ether_priv_data *pdata,
struct osi_dma_priv_data *osi_dma = pdata->osi_dma;
nveu32_t dma_channel = osi_dma->dma_chans[0];
unsigned char bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
unsigned int MAC_index[OSI_MAX_MAC_IP_TYPES] = {
ETHER_MAC_ADDRESS_INDEX,
ETHER_MAC_ADDRESS_INDEX,
ETHER_MAC_ADDRESS_INDEX_T26X
};
unsigned int BC_index[OSI_MAX_MAC_IP_TYPES] = {
ETHER_BC_ADDRESS_INDEX,
ETHER_BC_ADDRESS_INDEX,
ETHER_BC_ADDRESS_INDEX_T26X
};
if ((en_dis > OSI_ENABLE) || (uc_bc > ETHER_ADDRESS_MAC)) {
dev_err(pdata->dev,
@@ -2440,7 +2450,7 @@ static int ether_update_mac_addr_filter(struct ether_priv_data *pdata,
}
if (uc_bc == ETHER_ADDRESS_MAC) {
ioctl_data->l2_filter.index = ETHER_MAC_ADDRESS_INDEX;
ioctl_data->l2_filter.index = MAC_index[osi_core->mac];
memcpy(ioctl_data->l2_filter.mac_addr, osi_core->mac_addr,
ETH_ALEN);
} else {
@@ -2449,7 +2459,7 @@ static int ether_update_mac_addr_filter(struct ether_priv_data *pdata,
} else {
dma_channel = osi_dma->dma_chans[0];
}
ioctl_data->l2_filter.index = ETHER_BC_ADDRESS_INDEX;
ioctl_data->l2_filter.index = BC_index[osi_core->mac];
memcpy(ioctl_data->l2_filter.mac_addr, bc_addr, ETH_ALEN);
}
ioctl_data->l2_filter.dma_routing = OSI_ENABLE;

View File

@@ -208,8 +208,10 @@
/**
* @brief Broadcast and MAC address macros
*/
#define ETHER_MAC_ADDRESS_INDEX 1U
#define ETHER_BC_ADDRESS_INDEX 0
#define ETHER_MAC_ADDRESS_INDEX 1U
#define ETHER_BC_ADDRESS_INDEX 0U
#define ETHER_MAC_ADDRESS_INDEX_T26X 0U
#define ETHER_BC_ADDRESS_INDEX_T26X 1U
#define ETHER_ADDRESS_MAC 1
#define ETHER_ADDRESS_BC 0