From 4d4e8e54ebfcc2e609a746d7a41fcf1e9938cff0 Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Wed, 1 May 2024 20:57:36 +0100 Subject: [PATCH] PCI: tegra264: Fix build for Linux v6.9 The pci_epc_features structure was updated in Linux v6.9 to move various fields under a new pci_epc_bar_desc structure. Use conftest to determine if the new pci_epc_bar_desc structure is present. Finally, add the endpoint alignment for the inbound ATU on Tegra264 which is 64kB. Bug 4627271 Signed-off-by: Jon Hunter Change-Id: I074e19ca53cea0e13d9872b240a023dd83779ae7 Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3129630 Reviewed-by: Manikanta Maddireddy GVS: Gerrit_Virtual_Submit --- drivers/pci/controller/private-soc/pcie-tegra264-ep.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/pci/controller/private-soc/pcie-tegra264-ep.c b/drivers/pci/controller/private-soc/pcie-tegra264-ep.c index 57981dbd..092d709a 100644 --- a/drivers/pci/controller/private-soc/pcie-tegra264-ep.c +++ b/drivers/pci/controller/private-soc/pcie-tegra264-ep.c @@ -7,6 +7,8 @@ * Author: Manikanta Maddireddy */ +#include + #include #include #include @@ -525,8 +527,17 @@ static const struct pci_epc_features tegra264_pcie_epc_features = { .core_init_notifier = false, .msi_capable = true, .msix_capable = false, +#if defined (NV_PCI_EPC_FEATURES_STRUCT_HAS_BAR) + .bar[BAR_0] = { .type = BAR_RESERVED, }, + .bar[BAR_2] = { .type = BAR_FIXED, .fixed_size = SZ_32M, }, + .bar[BAR_3] = { .type = BAR_RESERVED, }, + .bar[BAR_4] = { .type = BAR_RESERVED, }, + .bar[BAR_5] = { .type = BAR_RESERVED, }, +#else .reserved_bar = 1 << BAR_0 | 1 << BAR_3 | 1 << BAR_4 | 1 << BAR_5, .bar_fixed_size[2] = SZ_32M, +#endif + .align = SZ_64K, }; static const struct pci_epc_features *tegra264_pcie_ep_get_features(struct pci_epc *epc,