From 558557ab0260d11d14a08afa3fa2f33845d54af7 Mon Sep 17 00:00:00 2001 From: Mikko Perttunen Date: Tue, 13 Apr 2021 14:47:28 +0300 Subject: [PATCH] drm/tegra: Add NVDEC support Support NVDEC (both instances on Tegra194). Signed-off-by: Mikko Perttunen Change-Id: I8f6c841a16103fbf37bff3a3440d69059f2644f0 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2532426 Reviewed-by: Jonathan Hunter Reviewed-by: svc_kernel_abi Reviewed-by: mobile promotions GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions --- drivers/gpu/host1x/dev.c | 18 ++++++++++++++++++ drivers/gpu/host1x/include/linux/host1x-next.h | 2 ++ 2 files changed, 20 insertions(+) diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c index 8b50fbb2..1aebefc3 100644 --- a/drivers/gpu/host1x/dev.c +++ b/drivers/gpu/host1x/dev.c @@ -132,6 +132,12 @@ static const struct host1x_sid_entry tegra186_sid_table[] = { .offset = 0x30, .limit = 0x34 }, + { + /* NVDEC */ + .base = 0x1b00, + .offset = 0x30, + .limit = 0x34 + }, }; static const struct host1x_info host1x06_info = { @@ -156,6 +162,18 @@ static const struct host1x_sid_entry tegra194_sid_table[] = { .offset = 0x30, .limit = 0x34 }, + { + /* NVDEC */ + .base = 0x1b00, + .offset = 0x30, + .limit = 0x34 + }, + { + /* NVDEC1 */ + .base = 0x1bc0, + .offset = 0x30, + .limit = 0x34 + }, }; static const struct host1x_info host1x07_info = { diff --git a/drivers/gpu/host1x/include/linux/host1x-next.h b/drivers/gpu/host1x/include/linux/host1x-next.h index 5890f91d..4b637aa6 100644 --- a/drivers/gpu/host1x/include/linux/host1x-next.h +++ b/drivers/gpu/host1x/include/linux/host1x-next.h @@ -15,6 +15,8 @@ enum host1x_class { HOST1X_CLASS_GR2D_SB = 0x52, HOST1X_CLASS_VIC = 0x5D, HOST1X_CLASS_GR3D = 0x60, + HOST1X_CLASS_NVDEC = 0xF0, + HOST1X_CLASS_NVDEC1 = 0xF5, }; struct host1x;