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virtual_i2c_mux:Add virtual i2c mux support for other Hawks.
Add virtual i2c bus support for 2nd,3rd & 4th Hawks to read/write EEPROM data while streaming. Bug 4807682 Change-Id: I3cd05718a38ed11dd23fd67fee1efb8c7054af71 Signed-off-by: Praveen AC <pac@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3210317 Reviewed-by: Bibek Basu <bbasu@nvidia.com> GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com> Reviewed-by: Ankur Pawar <ankurp@nvidia.com>
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@@ -15,7 +15,10 @@
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#include <linux/version.h>
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#include <linux/version.h>
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#define DESER_A (0)
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#define DESER_A (0)
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#define ENABLE_IMU (0xFE)
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#define ENABLE_CC1 (0xFE)
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#define ENABLE_CC2 (0xFB)
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#define ENABLE_CC3 (0xEF)
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#define ENABLE_CC4 (0xBF)
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#define ENABLE_ALL_CC (0xAA)
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#define ENABLE_ALL_CC (0xAA)
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#define DESER_ADDR (0x52)
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#define DESER_ADDR (0x52)
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#define DESER_CC_REG (0x0003)
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#define DESER_CC_REG (0x0003)
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@@ -27,10 +30,31 @@ static int virtual_i2c_mux_select(struct i2c_mux_core *muxc, u32 chan)
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int ret = 0;
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int ret = 0;
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/* Do select 1st channel, to access IMUs from 1st Hawk */
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/* Do select 1st channel, to access IMUs from 1st Hawk */
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if (!chan) {
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switch (chan) {
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ret = max96712_write_reg_Dser(DESER_ADDR, DESER_A, DESER_CC_REG, ENABLE_IMU);
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case 0:
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if (ret)
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ret = max96712_write_reg_Dser(DESER_ADDR, DESER_A, DESER_CC_REG, ENABLE_CC1);
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pr_err("%s: Failed to do i2c address trans for IMUs\n",__func__);
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if (ret)
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pr_err("%s: Failed to do i2c address trans for CC1\n", __func__);
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break;
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case 1:
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ret = max96712_write_reg_Dser(DESER_ADDR, DESER_A, DESER_CC_REG, ENABLE_CC2);
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if (ret)
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pr_err("%s: Failed to do i2c address trans for CC2\n", __func__);
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break;
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case 2:
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ret = max96712_write_reg_Dser(DESER_ADDR, DESER_A, DESER_CC_REG, ENABLE_CC3);
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if (ret)
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pr_err("%s: Failed to do i2c address trans for CC3\n", __func__);
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break;
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case 3:
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ret = max96712_write_reg_Dser(DESER_ADDR, DESER_A, DESER_CC_REG, ENABLE_CC4);
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if (ret)
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pr_err("%s: Failed to do i2c address trans for CC4\n", __func__);
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break;
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default:
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pr_err("%s: No channels matched chan = %d\n", __func__, chan);
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ret = -EINVAL;
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break;
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}
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}
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return ret;
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return ret;
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@@ -41,11 +65,10 @@ static int virtual_i2c_mux_deselect(struct i2c_mux_core *muxc, u32 chan)
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int ret = 0;
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int ret = 0;
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/* Enable all control channels */
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/* Enable all control channels */
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if (!chan) {
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ret = max96712_write_reg_Dser(DESER_ADDR, DESER_A, DESER_CC_REG, ENABLE_ALL_CC);
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ret = max96712_write_reg_Dser(DESER_ADDR, DESER_A, DESER_CC_REG, ENABLE_ALL_CC);
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if (ret)
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if (ret)
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pr_err("%s: Failed to do i2c address trans for IMUs\n",__func__);
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pr_err("%s: Failed to do i2c address trans for IMUs\n",__func__);
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}
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return ret;
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return ret;
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}
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}
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