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nvethernet: Update comments with Doxygen style
replace kernel doc comments with Doxygen style comments Bug 200512422 Change-Id: I1445cab3fb6708ddc21b4bfacebe213ed22f7aa2 Signed-off-by: Bhadram Varka <vbhadram@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2180213 Reviewed-by: Narayan Reddy <narayanr@nvidia.com> Tested-by: Narayan Reddy <narayanr@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
committed by
Revanth Kumar Uppala
parent
e1fbd14f38
commit
58301a3ef2
@@ -43,51 +43,103 @@
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#include <mmc.h>
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#include "ioctl.h"
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/**
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* @brief Max number of Ethernet IRQs supported in HW
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*/
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#define ETHER_MAX_IRQS 4
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/**
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* @brief Maximum index for IRQ numbers array.
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*/
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#define ETHER_IRQ_MAX_IDX 8
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/**
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* @brief Size of Ethernet IRQ name.
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*/
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#define ETHER_IRQ_NAME_SZ 32
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/**
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* @addtogroup Ethernet Transmit Queue Priority
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*
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* @brief Macros to define the default, maximum and invalid range of Transmit
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* queue priority. These macros are used to check the bounds of Tx queue
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* priority provided in the device tree.
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* @{
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*/
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#define ETHER_QUEUE_PRIO_DEFAULT 0U
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#define ETHER_QUEUE_PRIO_MAX 7U
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#define ETHER_QUEUE_PRIO_INVALID 0xFFU
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/** @} */
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/**
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* @brief Ethernet default PTP clock frequency
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*/
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#define ETHER_DFLT_PTP_CLK 312500000U
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/**
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* @addtogroup CONFIG Ethernet configuration error codes
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*
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* @brief Error codes for fail/success.
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* @{
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*/
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#define EQOS_CONFIG_FAIL -3
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#define EQOS_CONFIG_SUCCESS 0
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/** @} */
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/**
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* @addtogroup ADDR Ethernet MAC address register count
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*
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* @brief MAC L2 address filter count
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* @{
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*/
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#define ETHER_ADDR_REG_CNT_128 128
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#define ETHER_ADDR_REG_CNT_64 64
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#define ETHER_ADDR_REG_CNT_32 32
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#define ETHER_ADDR_REG_CNT_1 1
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/** @} */
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/**
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* @addtogroup HW MAC HW Filter Hash Table size
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*
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* @brief Represents Hash Table sizes.
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* @{
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*/
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#define HW_HASH_TBL_SZ_3 3
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#define HW_HASH_TBL_SZ_2 2
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#define HW_HASH_TBL_SZ_1 1
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#define HW_HASH_TBL_SZ_0 0
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/** @} */
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/**
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* @brief Ethernet Maximum HW MTU
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*/
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#define ETHER_MAX_HW_MTU 9000U
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/**
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* @brief Ethernet default platform supported MTU
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*/
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#define ETHER_DEFAULT_PLATFORM_MTU 1500U
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/* Map max. 4KB buffer per Tx descriptor */
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/**
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* @brief Maximum buffer length per DMA descriptor (4KB).
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*/
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#define ETHER_MAX_DATA_LEN_PER_TXD_BUF BIT(12)
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/* Incase of TSO/GSO, Tx ring needs atmost MAX_SKB_FRAGS +
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* one context descriptor +
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* one descriptor for header/linear buffer payload
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/**
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* @brief In-case of TSO/GSO, Tx ring needs atleast MAX_SKB_FRAGS +
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* one context descriptor +
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* one descriptor for header/linear buffer payload
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*/
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#define TX_DESC_THRESHOLD (MAX_SKB_FRAGS + 2)
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/**
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* ether_avail_txdesc_count - Return count of available tx desc.
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* @tx_ring: Tx ring instance associated with channel number
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*@brief Returns count of available transmit descriptors
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*
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* Algorithm: Check the difference between current desc index
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* and the desc. index to be cleaned.
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* Algorithm: Check the difference between current descriptor index
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* and the descriptor index to be cleaned.
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*
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* Dependencies: MAC needs to be initialized and Tx ring allocated.
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* @param[in] tx_ring: Tx ring instance associated with channel number
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*
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* Protection: None.
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* @note MAC needs to be initialized and Tx ring allocated.
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*
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* Return: Number of available descriptors in the given Tx ring.
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* @returns Number of available descriptors in the given Tx ring.
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*/
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static inline int ether_avail_txdesc_cnt(struct osi_tx_ring *tx_ring)
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{
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@@ -96,173 +148,219 @@ static inline int ether_avail_txdesc_cnt(struct osi_tx_ring *tx_ring)
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}
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#ifdef THERMAL_CAL
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/* The DT binding for ethernet device has 5 thermal zones in steps of
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/* @brief The DT binding for ethernet device has 5 thermal zones in steps of
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* 35 degress from -40C to 110C. Each zone corresponds to a state.
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*/
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#define ETHER_MAX_THERM_STATE 5UL
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#endif /* THERMAL_CAL */
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/**
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* struct ether_tx_napi - DMA Transmit Channel NAPI
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* @chan: Transmit channel number
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* @pdata: OSD private data
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* @napi: NAPI instance associated with transmit channel
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* @brief DMA Transmit Channel NAPI
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*/
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struct ether_tx_napi {
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/** Transmit channel number */
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unsigned int chan;
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/** OSD private data */
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struct ether_priv_data *pdata;
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/** NAPI instance associated with transmit channel */
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struct napi_struct napi;
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};
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/**
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* struct ether_rx_napi - DMA Receive Channel NAPI
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* @chan: Receive channel number
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* @pdata: OSD Private data
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* @napi: NAPI instance associated with receive channel
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*@brief DMA Receive Channel NAPI
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*/
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struct ether_rx_napi {
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/** Receive channel number */
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unsigned int chan;
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/** OSD private data */
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struct ether_priv_data *pdata;
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/** NAPI instance associated with transmit channel */
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struct napi_struct napi;
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};
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/**
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* struct ether_priv_data - Ethernet driver private data
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* @osi_core: OSI core private data
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* @osi_dma: OSI DMA private data
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* @hwfeat: HW supported feature list
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* @tx_napi: Array of DMA Transmit channel NAPI
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* @rx_napi: Array of DMA Receive channel NAPI
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* @ndev: Network device associated with driver
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* @dev: Base device associated with driver
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* @mac_rst: Reset for the MAC
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* @pllrefe_clk: PLLREFE clock
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* @axi_clk: Clock from AXI
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* @axi_cbb_clk: Clock from AXI CBB
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* @rx_clk: Receive clock (which will be driven from the PHY)
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* @ptp_ref_clk: PTP reference clock from AXI
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* @tx_clk: Transmit clock
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* @phy_node: Pointer to PHY device tree node
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* @mdio_node: Pointer to MDIO device tree node
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* @mii: Pointer to MII bus instance
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* @phydev: Pointer to the PHY device
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* @interface: Interface type assciated with MAC (SGMII/RGMII/...)
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* this information will be provided with phy-mode DT
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* entry
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* @oldlink: Previous detected link
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* @speed: PHY link speed
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* @oldduplex: Previous detected mode
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* @phy_reset: Reset for PHY
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* @rx_irq_alloc_mask: Tx IRQ alloc mask
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* @tx_irq_alloc_mask: Rx IRQ alloc mask
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* @common_irq: Common IRQ number for MAC
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* @tx_irqs: Array of DMA Transmit channel IRQ numbers
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* @rx_irqs: Array of DMA Receive channel IRQ numbers
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* @dma_mask: memory allocation mask
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* @mac_loopback_mode: MAC loopback mode
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* @txq_prio: Array of MTL queue TX priority
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* @hw_feat_cur_state: Current state of features enabled in HW
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* @tcd: Pointer to thermal cooling device which this driver
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* registers with the kernel. Kernel will invoke the
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* callback ops for this cooling device when temperate
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* in thermal zone defined in DT binding for this driver
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* is tripped.
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* @therm_state: Atomic variable to hold the current temperature zone
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* which has triggered.
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* @lock: Spin lock for filter code
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* @ioctl_lock: Spin lock for filter code ioctl path
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* @max_hash_table_size: hash table size; 0, 64,128 or 256
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* @num_mac_addr_regs: max address register count, 2*mac_addr64_sel
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* @last_mc_filter_index: Last Multicast address reg filter index, If 0,
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* no MC address added
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* @last_uc_filter_index: Last Unicast address reg filter index, If 0, no
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* MC and UC address added.
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* @l3_l4_filter: L3_l4 filter enabled 1: enabled
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* @vlan_hash_filtering: vlan hash filter 1: hash, 0: perfect
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* @l2_filtering_mode: l2 filter mode 1: hash 0: perfect
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* @ptp_clock_ops: PTP clock operations structure.
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* @ptp_clock: PTP system clock
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* @ptp_ref_clock_speed: PTP reference clock supported by platform
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* @hwts_tx_en: HW tx time stamping enable
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* @hwts_rx_en: HW rx time stamping enable
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* @max_platform_mtu: Max MTU supported by platform
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* @ptp_lock: Lock for accessing PTP registers
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* @brief Ethernet driver private data
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*/
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struct ether_priv_data {
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/** OSI core private data */
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struct osi_core_priv_data *osi_core;
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/** OSI DMA private data */
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struct osi_dma_priv_data *osi_dma;
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/** HW supported feature list */
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struct osi_hw_features hw_feat;
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/** Array of DMA Transmit channel NAPI */
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struct ether_tx_napi *tx_napi[OSI_EQOS_MAX_NUM_CHANS];
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/** Array of DMA Receive channel NAPI */
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struct ether_rx_napi *rx_napi[OSI_EQOS_MAX_NUM_CHANS];
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/** Network device associated with driver */
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struct net_device *ndev;
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/** Base device associated with driver */
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struct device *dev;
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/** Reset for the MAC */
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struct reset_control *mac_rst;
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/** PLLREFE clock */
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struct clk *pllrefe_clk;
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/** Clock from AXI */
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struct clk *axi_clk;
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/** Clock from AXI CBB */
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struct clk *axi_cbb_clk;
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/** Receive clock (which will be driven from the PHY) */
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struct clk *rx_clk;
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/** PTP reference clock from AXI */
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struct clk *ptp_ref_clk;
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/** Transmit clock */
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struct clk *tx_clk;
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/** Pointer to PHY device tree node */
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struct device_node *phy_node;
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/** Pointer to MDIO device tree node */
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struct device_node *mdio_node;
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/** Pointer to MII bus instance */
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struct mii_bus *mii;
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/** Pointer to the PHY device */
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struct phy_device *phydev;
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/** Interface type assciated with MAC (SGMII/RGMII/...)
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* this information will be provided with phy-mode DT entry */
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int interface;
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/** Previous detected link */
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unsigned int oldlink;
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/** PHY link speed */
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int speed;
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/** Previous detected mode */
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int oldduplex;
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/** Reset for PHY */
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int phy_reset;
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/** Rx IRQ alloc mask */
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unsigned int rx_irq_alloc_mask;
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/** Tx IRQ alloc mask */
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unsigned int tx_irq_alloc_mask;
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/** Common IRQ alloc mask */
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unsigned int common_irq_alloc_mask;
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/** Common IRQ number for MAC */
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int common_irq;
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/** Array of DMA Transmit channel IRQ numbers */
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int tx_irqs[ETHER_MAX_IRQS];
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/** Array of DMA Receive channel IRQ numbers */
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int rx_irqs[ETHER_MAX_IRQS];
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/** memory allocation mask */
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unsigned long long dma_mask;
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/** Current state of features enabled in HW*/
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netdev_features_t hw_feat_cur_state;
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/* for MAC loopback */
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/** MAC loopback mode */
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unsigned int mac_loopback_mode;
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unsigned int txq_prio[OSI_EQOS_MAX_NUM_QUEUES];
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/** Array of MTL queue TX priority */
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unsigned int txq_prio[OSI_EQOS_MAX_NUM_CHANS];
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#ifdef THERMAL_CAL
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/** Pointer to thermal cooling device which this driver registers
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* with the kernel. Kernel will invoke the callback ops for this
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* cooling device when temperate in thermal zone defined in DT
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* binding for this driver is tripped */
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struct thermal_cooling_device *tcd;
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/** Atomic variable to hold the current temperature zone
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* whcih has triggered */
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atomic_t therm_state;
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#endif /* THERMAL_CAL */
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/* for filtering */
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/** Spin lock for filter code */
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spinlock_t lock;
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/** Spin lock for Tx/Rx interrupt enable registers */
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spinlock_t rlock;
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/* spin lock for ioctl path */
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/** spin lock for filter code ioctl path */
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spinlock_t ioctl_lock;
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/** max address register count, 2*mac_addr64_sel */
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int num_mac_addr_regs;
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/** Last Multicast address reg filter index, If 0,no MC address added */
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int last_mc_filter_index;
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/** Last Unicast address reg filter index, If 0,no MC address added */
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int last_uc_filter_index;
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/** L3_l4 filter enabled 1: enabled */
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unsigned int l3_l4_filter;
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/** vlan hash filter 1: hash, 0: perfect */
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unsigned int vlan_hash_filtering;
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/** PTP clock operations structure */
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unsigned int l2_filtering_mode;
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/* for PTP */
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/** PTP clock operations structure */
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struct ptp_clock_info ptp_clock_ops;
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/** PTP system clock */
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struct ptp_clock *ptp_clock;
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/** PTP reference clock supported by platform */
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unsigned int ptp_ref_clock_speed;
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/** HW tx time stamping enable */
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unsigned int hwts_tx_en;
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/** HW rx time stamping enable */
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unsigned int hwts_rx_en;
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/** Max MTU supported by platform */
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unsigned int max_platform_mtu;
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/** Spin lock for PTP registers */
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raw_spinlock_t ptp_lock;
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};
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/**
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* @brief Set ethtool operations
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*
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* @param[in] ndev: network device instance
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*
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* @note Network device needs to created.
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*/
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void ether_set_ethtool_ops(struct net_device *ndev);
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/**
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* @brief Creates Ethernet sysfs group
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*
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* @param[in] dev: device instance
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*
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* @retval 0 - success,
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* @retval "negative value" - failure.
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*/
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int ether_sysfs_register(struct device *dev);
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/**
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* @brief Removes Ethernet sysfs group
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*
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* @param[in] dev: device instance
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*
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* @note nvethernet sysfs group need to be registered during probe.
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*/
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void ether_sysfs_unregister(struct device *dev);
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/**
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* @brief Function to register ptp clock driver
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*
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* Algorithm: This function is used to register the ptp clock driver to kernel
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*
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* @param[in] pdata: Pointer to private data structure.
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*
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* @note Driver probe need to be completed successfully with ethernet
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* network device created
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*
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* @retval 0 on success
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* @retval "negative value" on Failure
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*/
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int ether_ptp_init(struct ether_priv_data *pdata);
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/**
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* @brief Function to unregister ptp clock driver
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*
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* Algorithm: This function is used to remove ptp clock driver from kernel.
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*
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* @param[in] pdata: Pointer to private data structure.
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*
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* @note PTP clock driver need to be successfully registered during init
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*/
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void ether_ptp_remove(struct ether_priv_data *pdata);
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/**
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* @brief Function to handle PTP settings.
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*
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* Algorithm: This function is used to handle the hardware PTP settings.
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*
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* @param[in] pdata Pointer to private data structure.
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* @param[in] ifr Interface request structure used for socket ioctl
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*
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* @note PTP clock driver need to be successfully registered during
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* initialization and HW need to support PTP functionality.
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*
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* @retval 0 on success
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* @retval "negative value" on Failure
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*/
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int ether_handle_hwtstamp_ioctl(struct ether_priv_data *pdata,
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struct ifreq *ifr);
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int ether_handle_priv_ts_ioctl(struct ether_priv_data *pdata,
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