From 5de571fe8d36074f29042851b6726c63d4d0b153 Mon Sep 17 00:00:00 2001 From: Mikko Perttunen Date: Wed, 10 Aug 2022 17:09:16 +0300 Subject: [PATCH] drm/tegra: Add NVENC/NVJPG support on Tegra234 Add NVENC/NVJPG support on Tegra234. These work similarly to the ones on Tegra194, so no big changes. Bug 3778105 Signed-off-by: Mikko Perttunen Change-Id: I4a4b12d5625f927c69a6dc1c6b6bade1bca7b171 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2771770 (cherry picked from commit ee6576a1493dae1ddc5c8dc3b415d0987f670390) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2759062 Reviewed-by: Jonathan Hunter GVS: Gerrit_Virtual_Submit Tested-by: Jonathan Hunter --- drivers/gpu/host1x/dev.c | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c index 613f4d0e..3449aa5f 100644 --- a/drivers/gpu/host1x/dev.c +++ b/drivers/gpu/host1x/dev.c @@ -280,6 +280,42 @@ static const struct host1x_sid_entry tegra234_sid_table[] = { .offset = 0x34, .limit = 0x34, }, + { + /* NVENC channel */ + .base = 0x17c0, + .offset = 0x30, + .limit = 0x30, + }, + { + /* NVENC MMIO */ + .base = 0x1690, + .offset = 0x34, + .limit = 0x34, + }, + { + /* NVJPG channel */ + .base = 0x17d0, + .offset = 0x30, + .limit = 0x30, + }, + { + /* NVJPG MMIO */ + .base = 0x16a0, + .offset = 0x34, + .limit = 0x34, + }, + { + /* NVJPG1 channel */ + .base = 0x17a8, + .offset = 0x30, + .limit = 0x30, + }, + { + /* NVJPG1 MMIO */ + .base = 0x16b0, + .offset = 0x34, + .limit = 0x34, + }, { /* NVDLA channel */ .base = 0x17e0,