From 61586ca1df95f71199d1592bd0f389f5e0b0d2f1 Mon Sep 17 00:00:00 2001 From: Sheetal Tigadoli Date: Sun, 26 Mar 2023 14:08:01 +0000 Subject: [PATCH] Documentation:binding:nvpps: Add nvpps documentation Add nvpps documentation for dt binding Bug 3896607 Change-Id: I238424db9152539f24f0544de8be320701215bfd Signed-off-by: Sheetal Tigadoli Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2877069 Reviewed-by: Sumeet Gupta GVS: Gerrit_Virtual_Submit --- .../devicetree/bindings/nvpps/nvpps.txt | 69 +++++++++++++++++++ 1 file changed, 69 insertions(+) create mode 100644 Documentation/devicetree/bindings/nvpps/nvpps.txt diff --git a/Documentation/devicetree/bindings/nvpps/nvpps.txt b/Documentation/devicetree/bindings/nvpps/nvpps.txt new file mode 100644 index 00000000..b91a458b --- /dev/null +++ b/Documentation/devicetree/bindings/nvpps/nvpps.txt @@ -0,0 +1,69 @@ +NVIDIA nvpps driver bindings + +Nvpps is a Linux Kernel mode driver to support the Xavier & Orin time domain +correlation feature. + +Required properties: + +- compatibles: should be "nvpps,tegra194-nvpps" + +Optional properties: +- gpios: GPIO number and active level for the PPS input signal +- memmap_phc_regs: boolean flag to indicate MAC PHC regs to be memory mapped + for getting PTP time. If not defined ptp notifer method will + be used with selected interface +- interface: NW interface name to be used for MAC PHC regs. This field can be + set to 'eqos_0', 'mgbe0_0', 'mgbe1_0', 'mgbe2_0' or 'mgbe3_0' for Orin. + For Xavier, it shoud be set to 'eqos_0'. If undef, default to 'eqos_0' +- sec_interface: NW interface name to be used to calculate PTP Time offset. + set to 'eqos_0', 'mgbe0_0', 'mgbe1_0', 'mgbe2_0' or 'mgbe3_0' for Orin. + For Xavier, Leave this undefined. For Orin, If undef default to 'eqos_0' +- ptp_tsc_k_int: Specifies the integer part of the factor used to calculate the delta to + apply to NUM when the fast convergence algorithm is enabled when syncing + or locking TSC time with PTP time domain. + The value is a 8bit hexa-decimal value. If unspecified, NvPPS driver uses + 0x70 as default value +- ptp_tsc_lock_threshold: specifies the threshold value which is used by HW to determine + if the TSC PTP sync/Lock is lost. The lock is deemed to be lost if the HW + determined absolute diff between PTP & TSC time exceed this value. + The value is a 16bit hexa-decimal value. The minimum value(0x1F) supported + correspond to 1us and max value(0xFFFF) supported correspond to approx 2.1ms. + If unspecified, NvPPS driver uses 0x26C(corresponding to 20us) by default + +Example: + +nvpps { + compatible = "nvidia,tegrat194-nvpps"; + status = "okay"; + gpios = <&tegra_aon_gpio TEGRA194_AON_GPIO(BB, 2) GPIO_ACTIVE_HIGH>; +}; + +Example: + +nvpps { + compatible = "nvidia,tegra194-nvpps"; + status = "okay"; + gpios = <&tegra_aon_gpio TEGRA234_AON_GPIO(EE, 6) GPIO_ACTIVE_HIGH>; + memmap_phc_regs; + interface = "mgbe2_0"; +}; + +Example: + +nvpps { + compatible = "nvidia,tegra194-nvpps"; + status = "okay"; + gpios = <&tegra_aon_gpio TEGRA234_AON_GPIO(EE, 6) GPIO_ACTIVE_HIGH>; + interface = "mgbe2_0"; + sec_interface = "eqos_0"; + ptp_tsc_k_int = /bits/ 8 <0x70>; + ptp_tsc_lock_threshold = /bits/ 16 <0x26C> +}; + +Example: GPIO as optional + +nvpps { + compatible = "nvidia,tegra194-nvpps"; + status = "okay"; + interface = "mgbe2_0"; +};