diff --git a/drivers/video/tegra/host/nvdla/nvdla_queue.c b/drivers/video/tegra/host/nvdla/nvdla_queue.c index 0d8bfecd..36399857 100644 --- a/drivers/video/tegra/host/nvdla/nvdla_queue.c +++ b/drivers/video/tegra/host/nvdla/nvdla_queue.c @@ -1,7 +1,7 @@ /* * NVDLA queue and task management for T194 * - * Copyright (c) 2016-2020, NVIDIA Corporation. All rights reserved. + * Copyright (c) 2016-2021, NVIDIA Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -174,6 +174,11 @@ static int nvdla_unmap_task_memory(struct nvdla_task *task) /* unpin address list */ for (ii = 0; ii < task->num_addresses; ii++) { + if (task->memory_handles[ii].type == + NVDLA_BUFFER_TYPE_INTERNAL) { + /* No unpinning required for internal buffers */ + continue; + } if (task->memory_handles[ii].handle) { nvdla_buffer_submit_unpin(task->buffers, &task->memory_dmabuf[ii], 1); @@ -590,15 +595,24 @@ static int nvdla_map_task_memory(struct nvdla_task *task) for (jj = 0; jj < task->num_addresses; jj++) { dma_addr_t dma_addr; size_t dma_size; - err = -EFAULT; nvdla_dbg_info(pdev, "count[%d] handle[%u] offset[%u]", jj, task->memory_handles[jj].handle, task->memory_handles[jj].offset); - if (!task->memory_handles[jj].handle) + if (task->memory_handles[jj].type == + NVDLA_BUFFER_TYPE_INTERNAL) { + /* For internal buffers, offset is the final address */ + next = add_address(next, + task->memory_handles[jj].offset); + continue; + } + + if (!task->memory_handles[jj].handle) { + err = -EFAULT; goto fail_to_pin_mem; + } task->memory_dmabuf[jj] = dma_buf_get(task->memory_handles[jj].handle); diff --git a/include/uapi/linux/nvhost_nvdla_ioctl.h b/include/uapi/linux/nvhost_nvdla_ioctl.h index b203fda6..bd427e78 100644 --- a/include/uapi/linux/nvhost_nvdla_ioctl.h +++ b/include/uapi/linux/nvhost_nvdla_ioctl.h @@ -3,7 +3,7 @@ * * Tegra NvDLA Driver * - * Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2021, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -127,11 +127,18 @@ struct nvdla_get_q_status_args { * * @handle handle to buffer allocated in userspace * @offset offset in buffer + * @type buffer heap type + * @reserved reserved for future use * */ struct nvdla_mem_handle { __u32 handle; __u32 offset; +#define NVDLA_BUFFER_TYPE_MC 0U +#define NVDLA_BUFFER_TYPE_CV 1U +#define NVDLA_BUFFER_TYPE_INTERNAL 2U + __u8 type; + __u8 reserved[3]; }; /**