DCE-KMD: Refactor dce_work_cond_sw_resource_init()

- Move resource init specific to PM and bootstrap modules
  to respective PM and bootstrap init functions.

- Motivation here is 2 fold:
    1) To keep common code common across OSs.
    2) Move resource init to respective sub-modules.
        - We will have separate PM module for HVRTOS.
        - We will have separate dce-worker module for HVRTOS.

JIRA TDS-16052

Change-Id: I40f6943eb4173a0da7201dc58afb19aee2a0d04e
Signed-off-by: anupamg <anupamg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3190873
Reviewed-by: Arun Swain <arswain@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Mahesh Kumar <mahkumar@nvidia.com>
This commit is contained in:
anupamg
2024-08-08 19:49:58 +00:00
committed by Jon Hunter
parent 06db88ae67
commit 644c60d35c
5 changed files with 39 additions and 13 deletions

View File

@@ -408,6 +408,12 @@ int dce_boot_interface_init(struct tegra_dce *d)
goto err_init; goto err_init;
} }
ret = dce_init_work(d, &d->dce_bootstrap_work, dce_bootstrap_work_fn);
if (ret) {
dce_err(d, "Bootstrap work init failed");
goto err_init;
}
err_init: err_init:
return ret; return ret;
} }

View File

@@ -65,6 +65,12 @@ int dce_driver_init(struct tegra_dce *d)
goto err_client_init; goto err_client_init;
} }
ret = dce_pm_init(d);
if (ret) {
dce_err(d, "Failed to init DCE Power management");
goto err_pm_init;
}
ret = dce_work_cond_sw_resource_init(d); ret = dce_work_cond_sw_resource_init(d);
if (ret) { if (ret) {
dce_err(d, "dce sw resource init failed"); dce_err(d, "dce sw resource init failed");
@@ -82,6 +88,8 @@ int dce_driver_init(struct tegra_dce *d)
err_fsm_init: err_fsm_init:
dce_work_cond_sw_resource_deinit(d); dce_work_cond_sw_resource_deinit(d);
err_sw_init: err_sw_init:
dce_pm_deinit(d);
err_pm_init:
dce_client_deinit(d); dce_client_deinit(d);
err_client_init: err_client_init:
dce_admin_deinit(d); dce_admin_deinit(d);
@@ -109,6 +117,8 @@ void dce_driver_deinit(struct tegra_dce *d)
dce_work_cond_sw_resource_deinit(d); dce_work_cond_sw_resource_deinit(d);
dce_pm_deinit(d);
dce_client_deinit(d); dce_client_deinit(d);
dce_admin_deinit(d); dce_admin_deinit(d);

View File

@@ -170,3 +170,23 @@ int dce_pm_exit_sc7(struct tegra_dce *d)
out: out:
return ret; return ret;
} }
int dce_pm_init(struct tegra_dce *d)
{
int ret = 0;
ret = dce_init_work(d, &d->dce_resume_work, dce_resume_work_fn);
if (ret) {
dce_err(d, "resume work init failed");
goto done;
}
done:
return ret;
}
void dce_pm_deinit(struct tegra_dce *d)
{
USE(d);
// Nothing to do.
}

View File

@@ -110,18 +110,6 @@ int dce_work_cond_sw_resource_init(struct tegra_dce *d)
int ret = 0; int ret = 0;
int i; int i;
ret = dce_init_work(d, &d->dce_bootstrap_work, dce_bootstrap_work_fn);
if (ret) {
dce_err(d, "Bootstrap work init failed");
goto exit;
}
ret = dce_init_work(d, &d->dce_resume_work, dce_resume_work_fn);
if (ret) {
dce_err(d, "resume work init failed");
goto exit;
}
if (dce_cond_init(&d->dce_bootstrap_done)) { if (dce_cond_init(&d->dce_bootstrap_done)) {
dce_err(d, "dce boot wait condition init failed"); dce_err(d, "dce boot wait condition init failed");
ret = -1; ret = -1;

View File

@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
/* /*
* Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
*/ */
#ifndef DCE_PM_H #ifndef DCE_PM_H
@@ -12,6 +12,8 @@ struct dce_sc7_state {
uint32_t hsp_ie; uint32_t hsp_ie;
}; };
int dce_pm_init(struct tegra_dce *d);
void dce_pm_deinit(struct tegra_dce *d);
int dce_pm_enter_sc7(struct tegra_dce *d); int dce_pm_enter_sc7(struct tegra_dce *d);
int dce_pm_exit_sc7(struct tegra_dce *d); int dce_pm_exit_sc7(struct tegra_dce *d);
void dce_resume_work_fn(struct tegra_dce *d); void dce_resume_work_fn(struct tegra_dce *d);