diff --git a/drivers/platform/tegra/dce/dce-ast.c b/drivers/platform/tegra/dce/dce-ast.c index 830f2456..de40c2c1 100644 --- a/drivers/platform/tegra/dce/dce-ast.c +++ b/drivers/platform/tegra/dce/dce-ast.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -386,7 +386,7 @@ static void (*const ast_master_addr_fn[MAX_NO_ASTS][MAX_AST_REGIONS]) * * Ruturns 64 bit mask. */ -u64 dce_get_fw_ast_reg_mask(struct tegra_dce *d) +static u64 dce_get_fw_ast_reg_mask(struct tegra_dce *d) { struct dce_firmware *fw = d->fw_data; diff --git a/drivers/platform/tegra/dce/dce-bootstrap.c b/drivers/platform/tegra/dce/dce-bootstrap.c index 8a04a6f3..829f32d6 100644 --- a/drivers/platform/tegra/dce/dce-bootstrap.c +++ b/drivers/platform/tegra/dce/dce-bootstrap.c @@ -223,7 +223,7 @@ void dce_bootstrap_work_fn(struct tegra_dce *d) * * Return : Void */ -void dce_handle_irq_status(struct tegra_dce *d, u32 status) +static void dce_handle_irq_status(struct tegra_dce *d, u32 status) { if (status & DCE_IRQ_LOG_OVERFLOW) @@ -274,7 +274,7 @@ void dce_handle_irq_status(struct tegra_dce *d, u32 status) * * Return : Void */ -void dce_bootstrap_handle_boot_status(struct tegra_dce *d, u32 status) +static void dce_bootstrap_handle_boot_status(struct tegra_dce *d, u32 status) { int ret = 0; dce_mailbox_store_interface_status(d, status, diff --git a/drivers/platform/tegra/dce/dce-client-ipc.c b/drivers/platform/tegra/dce/dce-client-ipc.c index 66410163..c9faec2e 100644 --- a/drivers/platform/tegra/dce/dce-client-ipc.c +++ b/drivers/platform/tegra/dce/dce-client-ipc.c @@ -20,7 +20,7 @@ #define DCE_CLIENT_IPC_HANDLE_INVALID 0U #define DCE_CLIENT_IPC_HANDLE_VALID ((u32)BIT(31)) -struct tegra_dce_client_ipc client_handles[DCE_CLIENT_IPC_TYPE_MAX]; +static struct tegra_dce_client_ipc client_handles[DCE_CLIENT_IPC_TYPE_MAX]; static uint32_t dce_interface_type_map[DCE_CLIENT_IPC_TYPE_MAX] = { [DCE_CLIENT_IPC_TYPE_CPU_RM] = DCE_IPC_TYPE_DISPRM, @@ -63,7 +63,7 @@ out: return valid; } -struct tegra_dce_client_ipc *dce_client_ipc_lookup_handle(u32 handle) +static struct tegra_dce_client_ipc *dce_client_ipc_lookup_handle(u32 handle) { struct tegra_dce_client_ipc *cl = NULL; diff --git a/drivers/platform/tegra/dce/dce-debug.c b/drivers/platform/tegra/dce/dce-debug.c index f270ed9e..50c21270 100644 --- a/drivers/platform/tegra/dce/dce-debug.c +++ b/drivers/platform/tegra/dce/dce-debug.c @@ -621,7 +621,7 @@ void dce_remove_debug(struct tegra_dce *d) d_dev->debugfs = NULL; } -int dump_hsp_regs_show(struct seq_file *s, void *unused) +static int dump_hsp_regs_show(struct seq_file *s, void *unused) { u8 i = 0; struct tegra_dce *d = s->private; diff --git a/drivers/platform/tegra/dce/dce-ipc-signal.c b/drivers/platform/tegra/dce/dce-ipc-signal.c index 3a53b2e6..88c7a242 100644 --- a/drivers/platform/tegra/dce/dce-ipc-signal.c +++ b/drivers/platform/tegra/dce/dce-ipc-signal.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -16,7 +16,7 @@ #include #include -struct dce_ipc_signal_instance *mb_signals[DCE_NUM_MBOX_REGS]; +static struct dce_ipc_signal_instance *mb_signals[DCE_NUM_MBOX_REGS]; static void dce_ipc_mbox_notify(struct tegra_dce *d, struct dce_ipc_signal_instance *s) diff --git a/drivers/platform/tegra/dce/dce-ipc.c b/drivers/platform/tegra/dce/dce-ipc.c index b61b04ed..9df58596 100644 --- a/drivers/platform/tegra/dce/dce-ipc.c +++ b/drivers/platform/tegra/dce/dce-ipc.c @@ -22,7 +22,7 @@ #define CREATE_TRACE_POINTS #include -struct dce_ipc_channel ivc_channels[DCE_IPC_CH_KMD_TYPE_MAX] = { +static struct dce_ipc_channel ivc_channels[DCE_IPC_CH_KMD_TYPE_MAX] = { [DCE_IPC_CH_KMD_TYPE_ADMIN] = { .flags = DCE_IPC_CHANNEL_VALID | DCE_IPC_CHANNEL_MSG_HEADER, diff --git a/drivers/platform/tegra/dce/dce-module.c b/drivers/platform/tegra/dce/dce-module.c index 1931c3ae..5e80a427 100644 --- a/drivers/platform/tegra/dce/dce-module.c +++ b/drivers/platform/tegra/dce/dce-module.c @@ -301,7 +301,7 @@ static int dce_pm_resume(struct device *dev) return dce_pm_exit_sc7(d); } -const struct dev_pm_ops dce_pm_ops = { +static const struct dev_pm_ops dce_pm_ops = { .suspend = dce_pm_suspend, .resume = dce_pm_resume, }; diff --git a/drivers/platform/tegra/dce/dce-util-common.c b/drivers/platform/tegra/dce/dce-util-common.c index e2980b0e..0db7800f 100644 --- a/drivers/platform/tegra/dce/dce-util-common.c +++ b/drivers/platform/tegra/dce/dce-util-common.c @@ -117,7 +117,7 @@ bool dce_io_valid_reg(struct tegra_dce *d, u32 r) void *dce_kzalloc(struct tegra_dce *d, size_t size, bool dma_flag) { void *alloc; - u32 flags = GFP_KERNEL; + gfp_t flags = GFP_KERNEL; if (dma_flag) flags |= __GFP_DMA; @@ -628,7 +628,7 @@ void dce_schedule_work(struct dce_work_struct *work) * * Return : void */ -void dce_work_handle_fn(struct work_struct *work) +static void dce_work_handle_fn(struct work_struct *work) { struct dce_work_struct *dce_work = container_of(work, struct dce_work_struct,