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platform: tegra: Remove actmon driver for Tegra194
The tegra-cactmon driver is only used for Tegra194 and given that the out-of-tree drivers are only supported for Tegra234 and newer devices we can remove this driver. Bug 4174107 Change-Id: I152e8119b5c179f2d75771c1af2eb5d5f865ccbc Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2927995 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
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Jon Hunter
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commit
69b4420809
@@ -4,9 +4,6 @@
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tegra-bootloader-debug-objs := tegra_bootloader_debug.o
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tegra-bootloader-debug-objs := tegra_bootloader_debug.o
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obj-m += tegra-bootloader-debug.o
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obj-m += tegra-bootloader-debug.o
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tegra-cactmon-objs := cactmon.o
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tegra-cactmon-objs += actmon_common.o
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obj-m += tegra-cactmon.o
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obj-m += tegra-cactmon-mc-all.o
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obj-m += tegra-cactmon-mc-all.o
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obj-m += tegra-fsicom.o
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obj-m += tegra-fsicom.o
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File diff suppressed because it is too large
Load Diff
@@ -1,580 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0
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// Copyright (c) 2022, NVIDIA CORPORATION, All rights reserved.
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/reset.h>
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#if IS_ENABLED(CONFIG_INTERCONNECT)
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#include <linux/interconnect.h>
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#include <dt-bindings/interconnect/tegra_icc_id.h>
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#endif
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#include <linux/platform/tegra/emc_bwmgr.h>
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#include <linux/platform/tegra/actmon_common.h>
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#include <linux/platform/tegra/mc_utils.h>
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/************ START OF REG DEFINITION **************/
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/* Actmon common registers */
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#define ACTMON_GLB_CTRL 0x00
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#define ACTMON_GLB_INT_EN 0x04
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#define ACTMON_GLB_INT_STATUS 0x08
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/* Actmon device registers */
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/* ACTMON_*_CTRL_0 offset */
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#define ACTMON_DEV_CTRL 0x00
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/* ACTMON_*_CTRL_0 bit definitions */
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#define ACTMON_DEV_CTRL_UP_WMARK_NUM_SHIFT 26
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#define ACTMON_DEV_CTRL_UP_WMARK_NUM_MASK (0x7 << 26)
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#define ACTMON_DEV_CTRL_DOWN_WMARK_NUM_SHIFT 21
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#define ACTMON_DEV_CTRL_DOWN_WMARK_NUM_MASK (0x7 << 21)
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#define ACTMON_DEV_CTRL_PERIODIC_ENB (0x1 << 13)
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#define ACTMON_DEV_CTRL_K_VAL_SHIFT 10
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#define ACTMON_DEV_CTRL_K_VAL_MASK (0x7 << 10)
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/* ACTMON_*_INTR_ENABLE_0 */
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#define ACTMON_DEV_INTR_ENB 0x04
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/* ACTMON_*_INTR_ENABLE_0 bit definitions */
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#define ACTMON_DEV_INTR_UP_WMARK_ENB (0x1 << 31)
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#define ACTMON_DEV_INTR_DOWN_WMARK_ENB (0x1 << 30)
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#define ACTMON_DEV_INTR_AVG_UP_WMARK_ENB (0x1 << 29)
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#define ACTMON_DEV_INTR_AVG_DOWN_WMARK_ENB (0x1 << 28)
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/* ACTMON_*_INTR_STAUS_0 */
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#define ACTMON_DEV_INTR_STATUS 0x08
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/* ACTMON_*_UPPER_WMARK_0 */
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#define ACTMON_DEV_UP_WMARK 0x0c
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/* ACTMON_*_LOWER_WMARK_0 */
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#define ACTMON_DEV_DOWN_WMARK 0x10
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/* ACTMON_*_AVG_UPPER_WMARK_0 */
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#define ACTMON_DEV_AVG_UP_WMARK 0x14
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/* ACTMON_*_AVG_LOWER_WMARK_0 */
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#define ACTMON_DEV_AVG_DOWN_WMARK 0x18
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/* ACTMON_*_AVG_INIT_AVG_0 */
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#define ACTMON_DEV_INIT_AVG 0x1c
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/* ACTMON_*_COUNT_0 */
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#define ACTMON_DEV_COUNT 0x20
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/* ACTMON_*_AVG_COUNT_0 */
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#define ACTMON_DEV_AVG_COUNT 0x24
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/* ACTMON_*_AVG_COUNT_WEIGHT_0 */
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#define ACTMON_DEV_COUNT_WEGHT 0x28
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/* ACTMON_*_CUMULATIVE_COUNT_0 */
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#define ACTMON_DEV_CUMULATIVE_COUNT 0x2c
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/************ END OF REG DEFINITION **************/
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/******** start of actmon register operations **********/
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static void set_prd(u32 val, void __iomem *base)
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{
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__raw_writel(val, base + ACTMON_GLB_CTRL);
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}
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static void set_glb_intr(u32 val, void __iomem *base)
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{
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__raw_writel(val, base + ACTMON_GLB_INT_EN);
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}
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static u32 get_glb_intr_st(void __iomem *base)
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{
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return __raw_readl(base + ACTMON_GLB_INT_STATUS);
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}
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/******** end of actmon register operations **********/
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/*********start of actmon device register operations***********/
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static void set_init_avg(u32 val, void __iomem *base)
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{
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__raw_writel(val, base + ACTMON_DEV_INIT_AVG);
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}
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static void set_avg_up_wm(u32 val, void __iomem *base)
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{
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__raw_writel(val, base + ACTMON_DEV_AVG_UP_WMARK);
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}
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static void set_avg_dn_wm(u32 val, void __iomem *base)
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{
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__raw_writel(val, base + ACTMON_DEV_AVG_DOWN_WMARK);
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}
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static void set_dev_up_wm(u32 val, void __iomem *base)
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{
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__raw_writel(val, base + ACTMON_DEV_UP_WMARK);
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}
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static void set_dev_dn_wm(u32 val, void __iomem *base)
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{
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__raw_writel(val, base + ACTMON_DEV_DOWN_WMARK);
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}
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static void set_cnt_wt(u32 val, void __iomem *base)
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{
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__raw_writel(val, base + ACTMON_DEV_COUNT_WEGHT);
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}
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static void set_intr_st(u32 val, void __iomem *base)
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{
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__raw_writel(val, base + ACTMON_DEV_INTR_STATUS);
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}
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static u32 get_intr_st(void __iomem *base)
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{
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return __raw_readl(base + ACTMON_DEV_INTR_STATUS);
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}
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static void init_dev_cntrl(struct actmon_dev *dev, void __iomem *base)
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{
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u32 val = 0;
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val |= ACTMON_DEV_CTRL_PERIODIC_ENB;
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val |= (((dev->avg_window_log2 - 1) << ACTMON_DEV_CTRL_K_VAL_SHIFT)
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& ACTMON_DEV_CTRL_K_VAL_MASK);
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val |= (((dev->down_wmark_window - 1) <<
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ACTMON_DEV_CTRL_DOWN_WMARK_NUM_SHIFT) &
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ACTMON_DEV_CTRL_DOWN_WMARK_NUM_MASK);
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val |= (((dev->up_wmark_window - 1) <<
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ACTMON_DEV_CTRL_UP_WMARK_NUM_SHIFT) &
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ACTMON_DEV_CTRL_UP_WMARK_NUM_MASK);
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__raw_writel(val, base + ACTMON_DEV_CTRL);
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}
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static void enb_dev_intr_all(void __iomem *base)
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{
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u32 val = 0;
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val |= (ACTMON_DEV_INTR_UP_WMARK_ENB |
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ACTMON_DEV_INTR_DOWN_WMARK_ENB |
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ACTMON_DEV_INTR_AVG_UP_WMARK_ENB |
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ACTMON_DEV_INTR_AVG_DOWN_WMARK_ENB);
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__raw_writel(val, base + ACTMON_DEV_INTR_ENB);
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}
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static void enb_dev_intr(u32 val, void __iomem *base)
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{
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__raw_writel(val, base + ACTMON_DEV_INTR_ENB);
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}
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static u32 get_dev_intr(void __iomem *base)
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{
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return __raw_readl(base + ACTMON_DEV_INTR_ENB);
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}
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static u32 get_avg_cnt(void __iomem *base)
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{
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return __raw_readl(base + ACTMON_DEV_AVG_COUNT);
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}
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static u32 get_raw_cnt(void __iomem *base)
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{
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return __raw_readl(base + ACTMON_DEV_COUNT);
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}
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static void enb_dev_wm(u32 *val)
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{
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*val |= (ACTMON_DEV_INTR_UP_WMARK_ENB |
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ACTMON_DEV_INTR_DOWN_WMARK_ENB);
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}
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static void disb_dev_up_wm(u32 *val)
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{
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*val &= ~ACTMON_DEV_INTR_UP_WMARK_ENB;
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}
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static void disb_dev_dn_wm(u32 *val)
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{
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*val &= ~ACTMON_DEV_INTR_DOWN_WMARK_ENB;
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}
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/*********end of actmon device register operations***********/
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static void actmon_dev_reg_ops_init(struct actmon_dev *adev)
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{
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adev->ops.set_init_avg = set_init_avg;
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adev->ops.set_avg_up_wm = set_avg_up_wm;
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adev->ops.set_avg_dn_wm = set_avg_dn_wm;
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adev->ops.set_dev_up_wm = set_dev_up_wm;
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adev->ops.set_dev_dn_wm = set_dev_dn_wm;
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adev->ops.set_cnt_wt = set_cnt_wt;
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adev->ops.set_intr_st = set_intr_st;
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adev->ops.get_intr_st = get_intr_st;
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adev->ops.init_dev_cntrl = init_dev_cntrl;
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adev->ops.enb_dev_intr_all = enb_dev_intr_all;
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adev->ops.enb_dev_intr = enb_dev_intr;
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adev->ops.get_dev_intr_enb = get_dev_intr;
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adev->ops.get_avg_cnt = get_avg_cnt;
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adev->ops.get_raw_cnt = get_raw_cnt;
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adev->ops.enb_dev_wm = enb_dev_wm;
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adev->ops.disb_dev_up_wm = disb_dev_up_wm;
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adev->ops.disb_dev_dn_wm = disb_dev_dn_wm;
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}
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static unsigned long actmon_dev_get_max_rate(struct actmon_dev *adev)
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{
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unsigned long rate = 0;
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if (!adev->bwmgr_disable)
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return tegra_bwmgr_get_max_emc_rate();
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if (adev->dram_clk_handle) {
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rate = clk_round_rate(adev->dram_clk_handle, ULONG_MAX);
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return rate;
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}
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return 0;
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}
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static unsigned long actmon_dev_get_rate(struct actmon_dev *adev)
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{
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unsigned long rate = 0;
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if (!adev->bwmgr_disable)
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return tegra_bwmgr_get_emc_rate();
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if (adev->dram_clk_handle) {
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rate = clk_get_rate(adev->dram_clk_handle);
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return rate;
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}
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return 0;
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}
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static unsigned long actmon_dev_post_change_rate(
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struct actmon_dev *adev, void *cclk)
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{
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struct clk_notifier_data *clk_data = cclk;
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return clk_data->new_rate;
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}
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/* TBD: Use the implementation from mc_utils */
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#if IS_ENABLED(CONFIG_INTERCONNECT)
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#define BYTES_PER_CLK_PER_CH 4
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#define CH_16 16
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#define CH_16_BYTES_PER_CLK (BYTES_PER_CLK_PER_CH * CH_16)
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unsigned long emc_freq_to_bw(unsigned long freq)
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{
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return freq * CH_16_BYTES_PER_CLK;
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}
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#endif
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static void icc_set_rate(struct actmon_dev *adev, unsigned long freq)
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{
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#if IS_ENABLED(CONFIG_INTERCONNECT)
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struct icc_path *icc_path_handle = NULL;
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u32 floor_bw_kbps = 0;
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icc_path_handle = (struct icc_path *)adev->clnt;
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floor_bw_kbps = emc_freq_to_bw(freq);
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icc_set_bw(icc_path_handle, 0, floor_bw_kbps);
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#endif
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}
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static void actmon_dev_set_rate(struct actmon_dev *adev,
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unsigned long freq)
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{
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struct tegra_bwmgr_client *bwclnt = NULL;
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if (!adev->bwmgr_disable) {
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bwclnt = (struct tegra_bwmgr_client *)adev->clnt;
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tegra_bwmgr_set_emc(bwclnt, freq * 1000,
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TEGRA_BWMGR_SET_EMC_FLOOR);
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} else {
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icc_set_rate(adev, freq);
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}
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}
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static int cactmon_bwmgr_register(
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struct actmon_dev *adev, struct platform_device *pdev)
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{
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struct tegra_bwmgr_client *bwclnt = (struct tegra_bwmgr_client *)
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adev->clnt;
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struct device *mon_dev = &pdev->dev;
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int ret = 0;
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bwclnt = tegra_bwmgr_register(TEGRA_BWMGR_CLIENT_MON);
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if (IS_ERR_OR_NULL(bwclnt)) {
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ret = -ENODEV;
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dev_err(mon_dev, "emc bw manager registration failed for %s\n",
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adev->dn->name);
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return ret;
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}
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adev->clnt = bwclnt;
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return ret;
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}
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static void cactmon_bwmgr_unregister(
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struct actmon_dev *adev, struct platform_device *pdev)
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{
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struct tegra_bwmgr_client *bwclnt = (struct tegra_bwmgr_client *)
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adev->clnt;
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struct device *mon_dev = &pdev->dev;
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if (bwclnt) {
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dev_dbg(mon_dev, "unregistering BW manager for %s\n",
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adev->dn->name);
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tegra_bwmgr_unregister(bwclnt);
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adev->clnt = NULL;
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}
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}
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static int cactmon_icc_register(
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struct actmon_dev *adev, struct platform_device *pdev)
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{
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int ret = 0;
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#if IS_ENABLED(CONFIG_INTERCONNECT)
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struct icc_path *icc_path_handle = NULL;
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struct device *mon_dev = &pdev->dev;
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|
||||||
icc_path_handle = icc_get(mon_dev, TEGRA_ICC_CACTMON, TEGRA_ICC_PRIMARY);
|
|
||||||
if (IS_ERR_OR_NULL(icc_path_handle)) {
|
|
||||||
ret = -ENODEV;
|
|
||||||
dev_err(mon_dev, "icc registration failed for %s\n",
|
|
||||||
adev->dn->name);
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
adev->clnt = icc_path_handle;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void cactmon_icc_unregister(
|
|
||||||
struct actmon_dev *adev, struct platform_device *pdev)
|
|
||||||
{
|
|
||||||
#if IS_ENABLED(CONFIG_INTERCONNECT)
|
|
||||||
struct icc_path *icc_path_handle = (struct icc_path *)
|
|
||||||
adev->clnt;
|
|
||||||
struct device *mon_dev = &pdev->dev;
|
|
||||||
|
|
||||||
if (icc_path_handle) {
|
|
||||||
dev_dbg(mon_dev, "unregistering icc for %s\n",
|
|
||||||
adev->dn->name);
|
|
||||||
icc_put(icc_path_handle);
|
|
||||||
adev->clnt = NULL;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
static int cactmon_register_bw(
|
|
||||||
struct actmon_dev *adev, struct platform_device *pdev)
|
|
||||||
{
|
|
||||||
int ret = 0;
|
|
||||||
|
|
||||||
if (adev->bwmgr_disable)
|
|
||||||
ret = cactmon_icc_register(adev, pdev);
|
|
||||||
else
|
|
||||||
ret = cactmon_bwmgr_register(adev, pdev);
|
|
||||||
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void cactmon_unregister_bw(
|
|
||||||
struct actmon_dev *adev, struct platform_device *pdev)
|
|
||||||
{
|
|
||||||
if (adev->bwmgr_disable)
|
|
||||||
cactmon_icc_unregister(adev, pdev);
|
|
||||||
else
|
|
||||||
cactmon_bwmgr_unregister(adev, pdev);
|
|
||||||
}
|
|
||||||
|
|
||||||
static int actmon_dev_platform_init(struct actmon_dev *adev,
|
|
||||||
struct platform_device *pdev)
|
|
||||||
{
|
|
||||||
struct tegra_bwmgr_client *bwclnt;
|
|
||||||
int ret = 0;
|
|
||||||
|
|
||||||
ret = cactmon_register_bw(adev, pdev);
|
|
||||||
if (ret)
|
|
||||||
goto end;
|
|
||||||
|
|
||||||
adev->dev_name = adev->dn->name;
|
|
||||||
adev->max_freq = actmon_dev_get_max_rate(adev);
|
|
||||||
|
|
||||||
if (!adev->bwmgr_disable) {
|
|
||||||
bwclnt = (struct tegra_bwmgr_client *) adev->clnt;
|
|
||||||
tegra_bwmgr_set_emc(bwclnt, adev->max_freq,
|
|
||||||
TEGRA_BWMGR_SET_EMC_FLOOR);
|
|
||||||
} else {
|
|
||||||
icc_set_rate(adev, adev->max_freq);
|
|
||||||
}
|
|
||||||
|
|
||||||
adev->max_freq /= 1000;
|
|
||||||
actmon_dev_reg_ops_init(adev);
|
|
||||||
adev->actmon_dev_set_rate = actmon_dev_set_rate;
|
|
||||||
adev->actmon_dev_get_rate = actmon_dev_get_rate;
|
|
||||||
if (adev->rate_change_nb.notifier_call) {
|
|
||||||
if (!adev->bwmgr_disable)
|
|
||||||
ret = tegra_bwmgr_notifier_register(&adev->rate_change_nb);
|
|
||||||
else
|
|
||||||
ret = clk_notifier_register(adev->dram_clk_handle, &adev->rate_change_nb);
|
|
||||||
|
|
||||||
if (ret) {
|
|
||||||
pr_err("Failed to register bw manager rate change notifier for %s\n",
|
|
||||||
adev->dev_name);
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
adev->actmon_dev_post_change_rate = actmon_dev_post_change_rate;
|
|
||||||
end:
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void cactmon_free_resource(
|
|
||||||
struct actmon_dev *adev, struct platform_device *pdev)
|
|
||||||
{
|
|
||||||
int ret = 0;
|
|
||||||
|
|
||||||
if (adev->rate_change_nb.notifier_call) {
|
|
||||||
if (!adev->bwmgr_disable)
|
|
||||||
ret = tegra_bwmgr_notifier_unregister(&adev->rate_change_nb);
|
|
||||||
else
|
|
||||||
ret = clk_notifier_unregister(adev->dram_clk_handle, &adev->rate_change_nb);
|
|
||||||
|
|
||||||
if (ret) {
|
|
||||||
pr_err("Failed to register bw manager rate change notifier for %s\n",
|
|
||||||
adev->dev_name);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
cactmon_unregister_bw(adev, pdev);
|
|
||||||
}
|
|
||||||
|
|
||||||
static int cactmon_reset_dinit(struct platform_device *pdev)
|
|
||||||
{
|
|
||||||
struct actmon_drv_data *actmon = platform_get_drvdata(pdev);
|
|
||||||
struct device *mon_dev = &pdev->dev;
|
|
||||||
int ret = -EINVAL;
|
|
||||||
|
|
||||||
if (actmon->actmon_rst) {
|
|
||||||
ret = reset_control_assert(actmon->actmon_rst);
|
|
||||||
if (ret)
|
|
||||||
dev_err(mon_dev, "failed to assert actmon\n");
|
|
||||||
}
|
|
||||||
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int cactmon_reset_init(struct platform_device *pdev)
|
|
||||||
{
|
|
||||||
struct actmon_drv_data *actmon = platform_get_drvdata(pdev);
|
|
||||||
struct device *mon_dev = &pdev->dev;
|
|
||||||
int ret = 0;
|
|
||||||
|
|
||||||
actmon->actmon_rst = devm_reset_control_get(mon_dev, "actmon_rst");
|
|
||||||
if (IS_ERR(actmon->actmon_rst)) {
|
|
||||||
ret = PTR_ERR(actmon->actmon_rst);
|
|
||||||
dev_err(mon_dev, "can not get actmon reset%d\n", ret);
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Make actmon out of reset */
|
|
||||||
ret = reset_control_deassert(actmon->actmon_rst);
|
|
||||||
if (ret)
|
|
||||||
dev_err(mon_dev, "failed to deassert actmon\n");
|
|
||||||
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static int cactmon_clk_disable(struct platform_device *pdev)
|
|
||||||
{
|
|
||||||
struct actmon_drv_data *actmon = platform_get_drvdata(pdev);
|
|
||||||
struct device *mon_dev = &pdev->dev;
|
|
||||||
int ret = 0;
|
|
||||||
|
|
||||||
if (actmon->actmon_clk) {
|
|
||||||
clk_disable_unprepare(actmon->actmon_clk);
|
|
||||||
devm_clk_put(mon_dev, actmon->actmon_clk);
|
|
||||||
actmon->actmon_clk = NULL;
|
|
||||||
dev_dbg(mon_dev, "actmon clocks disabled\n");
|
|
||||||
}
|
|
||||||
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int cactmon_clk_enable(struct platform_device *pdev)
|
|
||||||
{
|
|
||||||
struct actmon_drv_data *actmon = platform_get_drvdata(pdev);
|
|
||||||
struct device *mon_dev = &pdev->dev;
|
|
||||||
int ret = 0;
|
|
||||||
|
|
||||||
actmon->actmon_clk = devm_clk_get(mon_dev, "actmon");
|
|
||||||
if (IS_ERR_OR_NULL(actmon->actmon_clk)) {
|
|
||||||
dev_err(mon_dev, "unable to find actmon clock\n");
|
|
||||||
ret = PTR_ERR(actmon->actmon_clk);
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
ret = clk_prepare_enable(actmon->actmon_clk);
|
|
||||||
if (ret) {
|
|
||||||
dev_err(mon_dev, "unable to enable actmon clock\n");
|
|
||||||
goto end;
|
|
||||||
}
|
|
||||||
|
|
||||||
actmon->freq = clk_get_rate(actmon->actmon_clk) / 1000;
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
end:
|
|
||||||
devm_clk_put(mon_dev, actmon->actmon_clk);
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct actmon_drv_data actmon_data = {
|
|
||||||
.clock_init = cactmon_clk_enable,
|
|
||||||
.clock_deinit = cactmon_clk_disable,
|
|
||||||
.reset_init = cactmon_reset_init,
|
|
||||||
.reset_deinit = cactmon_reset_dinit,
|
|
||||||
.dev_free_resource = cactmon_free_resource,
|
|
||||||
.actmon_dev_platform_init = actmon_dev_platform_init,
|
|
||||||
.ops.set_sample_prd = set_prd,
|
|
||||||
.ops.set_glb_intr = set_glb_intr,
|
|
||||||
.ops.get_glb_intr_st = get_glb_intr_st,
|
|
||||||
};
|
|
||||||
|
|
||||||
static const struct of_device_id tegra_actmon_of_match[] = {
|
|
||||||
{ .compatible = "nvidia,tegra194-cactmon", .data = &actmon_data, },
|
|
||||||
{ .compatible = "nvidia,tegra186-cactmon", .data = &actmon_data, },
|
|
||||||
{ .compatible = "nvidia,tegra234-cactmon", .data = &actmon_data, },
|
|
||||||
{},
|
|
||||||
};
|
|
||||||
|
|
||||||
static int __init tegra_actmon_probe(struct platform_device *pdev)
|
|
||||||
{
|
|
||||||
int ret = 0;
|
|
||||||
const struct of_device_id *of_id;
|
|
||||||
struct actmon_drv_data *actmon;
|
|
||||||
|
|
||||||
of_id = of_match_node(tegra_actmon_of_match, pdev->dev.of_node);
|
|
||||||
if (of_id == NULL) {
|
|
||||||
pr_err("No matching of node\n");
|
|
||||||
ret = -ENODATA;
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
actmon = (struct actmon_drv_data *)of_id->data;
|
|
||||||
platform_set_drvdata(pdev, actmon);
|
|
||||||
actmon->pdev = pdev;
|
|
||||||
ret = tegra_actmon_register(actmon);
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct platform_driver tegra19x_actmon_driver __refdata = {
|
|
||||||
.probe = tegra_actmon_probe,
|
|
||||||
.remove = tegra_actmon_remove,
|
|
||||||
.driver = {
|
|
||||||
.name = "tegra_actmon",
|
|
||||||
.owner = THIS_MODULE,
|
|
||||||
.of_match_table = of_match_ptr(tegra_actmon_of_match),
|
|
||||||
},
|
|
||||||
};
|
|
||||||
|
|
||||||
module_platform_driver(tegra19x_actmon_driver);
|
|
||||||
|
|
||||||
MODULE_DESCRIPTION("Central Tegra Activity Monitor");
|
|
||||||
MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
|
|
||||||
MODULE_LICENSE("GPL v2");
|
|
||||||
|
|
||||||
Reference in New Issue
Block a user