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nvethernet: Get HV window base from DT

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Issue: SID needs to be programmed through HV window
to get it reflected in controller register space.
Currently its programmed through RM window.

Fix: Get HV window base address from DT and program
in controller registers in non-hypervisor mode.
Store MAC instance ID to program the same ASID
values which are used in DT.

Bug 200761024

Change-Id: Ie9bcaebcba39f2d07438c9502591c0f51f22378f
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2592481
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Bhadram Varka
2021-09-10 15:06:14 +05:30
committed by Revanth Kumar Uppala
parent c33c0b334c
commit 6c979ebdd5
2 changed files with 23 additions and 0 deletions
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21
drivers/net/ethernet/nvidia/nvethernet/ether_linux.c
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@@ -5050,6 +5050,7 @@ exit:
static int ether_init_plat_resources(struct platform_device *pdev,
struct ether_priv_data *pdata)
{
bool tegra_hypervisor_mode = is_tegra_hypervisor_mode();
struct osi_core_priv_data *osi_core = pdata->osi_core;
struct osi_dma_priv_data *osi_dma = pdata->osi_dma;
struct resource *res;
@@ -5063,6 +5064,26 @@ static int ether_init_plat_resources(struct platform_device *pdev,
return PTR_ERR(osi_core->base);
}
if (!tegra_hypervisor_mode) {
res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
"hv-base");
if (res) {
osi_core->hv_base = devm_ioremap_resource(&pdev->dev,
res);
if (IS_ERR(osi_core->hv_base)) {
dev_err(&pdev->dev,
"failed to ioremap HV address\n");
return PTR_ERR(osi_core->hv_base);
}
} else {
osi_core->hv_base = NULL;
dev_dbg(&pdev->dev, "HV base address is not present\n");
}
} else {
osi_core->hv_base = NULL;
dev_dbg(&pdev->dev, "Hypervisor mode enabled\n");
}
res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
"dma_base");
if (res) {