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nvethernet: Enable Rx csum offload only for EQOS

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Issue: Rx csum offload can be safely enabled
       for EQOS as there is reliable HW sequence to
       ensure data validity when processing descriptors
       which are SW owned.
Fix:   Enable Rxcsum for eqos.

Bug 4486046

Change-Id: Ic3ef7317cfc9d22c0756afc6dfc9f98ce6743977
Signed-off-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3126197
(cherry picked from commit 7e908f2f0bce0650b21c64fddb31401f190c26df)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3146940
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Tested-by: Hareesh Kesireddy <hkesireddy@nvidia.com>
Reviewed-by: Hareesh Kesireddy <hkesireddy@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Tested-by: Amlan Kundu <akundu@nvidia.com>
This commit is contained in:
Srinivas Ramachandran
2024-04-25 14:56:26 -07:00
committed by mobile promotions
parent 8862f64e15
commit 70999e5756
2 changed files with 29 additions and 1 deletions
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28
drivers/net/ethernet/nvidia/nvethernet/ether_linux.c
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@@ -2688,6 +2688,17 @@ static int ether_open(struct net_device *dev)
goto err_hw_init;
}
if ((pdata->osi_core->mac == OSI_MAC_HW_MGBE) &&
(pdata->disable_rx_csum == 1U)) {
ioctl_data.cmd = OSI_CMD_RXCSUM_OFFLOAD;
ioctl_data.arg1_u32 = OSI_DISABLE;
ret = osi_handle_ioctl(osi_core, &ioctl_data);
if (ret < 0) {
dev_info(pdata->dev, "Rx Csum offload: Disable: Failed\n");
goto err_hw_init;
}
}
for (i = 0; i < pdata->osi_dma->num_dma_chans; i++) {
chan = pdata->osi_dma->dma_chans[i];
ioctl_data.cmd = OSI_CMD_FREE_TS;
@@ -5719,6 +5730,14 @@ static int ether_parse_dt(struct ether_priv_data *pdata)
pdata->osi_core->pause_frames = OSI_PAUSE_FRAMES_DISABLE;
}
#endif /* !OSI_STRIPPED_LIB */
/* Read property to disable Rx checksum offload */
ret = of_property_read_u32(np, "nvidia,disable-rx-checksum",
&pdata->disable_rx_csum);
if (ret < 0) {
dev_info(dev, "Failed to read nvida,disable-rx-checksum, so"
" setting to default - rx checksum offload enabled\n");
pdata->disable_rx_csum = OSI_DISABLE;
}
/* Check if IOMMU is enabled */
if (iommu_get_domain_for_dev(&pdev->dev) != NULL) {
@@ -6375,7 +6394,14 @@ static void ether_set_ndev_features(struct net_device *ndev,
features |= NETIF_F_IPV6_CSUM;
}
if (pdata->hw_feat.rx_coe_sel) {
/* Enable Rx csum offload only for EQOS until the
* HW WAR sequence is clear for MGBE - to avoid data
* data corruption issue in Bug 4486046. Check if DT
* prop is provided to disable Rx csum for MGBE.
*/
if ((pdata->hw_feat.rx_coe_sel) &&
((pdata->disable_rx_csum == OSI_DISABLE) ||
(pdata->osi_core->mac == OSI_MAC_HW_EQOS))) {
features |= NETIF_F_RXCSUM;
}