diff --git a/include/soc/tegra/camrtc-capture-messages.h b/include/soc/tegra/camrtc-capture-messages.h
index ec8debef..9dcb1fdf 100644
--- a/include/soc/tegra/camrtc-capture-messages.h
+++ b/include/soc/tegra/camrtc-capture-messages.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (c) 2016-2023, NVIDIA Corporation.  All rights reserved.
+ * Copyright (c) 2016-2023, NVIDIA CORPORATION & AFFILIATES.  All rights reserved.
  */
 
 /**
diff --git a/include/soc/tegra/camrtc-capture.h b/include/soc/tegra/camrtc-capture.h
index 4771c3ab..43f20fba 100644
--- a/include/soc/tegra/camrtc-capture.h
+++ b/include/soc/tegra/camrtc-capture.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (c) 2016-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * Copyright (c) 2016-2023, NVIDIA CORPORATION & AFFILIATES.  All rights reserved.
  */
 
 /**
@@ -888,6 +888,16 @@ struct engine_status_surface {
 	uint32_t offset_hi;
 } CAPTURE_IVC_ALIGN;
 
+/**
+ * @brief Watermark offset for specifying address within watermark ring buffer.
+ */
+struct watermark_mem_offset {
+	/** Index within watermark buffer */
+	uint32_t buff_idx;
+	/** Size of watermark */
+	uint32_t size;
+} CAPTURE_IVC_ALIGN;
+
 /**
  * @brief NVCSI error status
  *
@@ -1436,16 +1446,6 @@ struct memoryinfo_surface {
 	uint64_t size;
 };
 
-/**
- * @brief Watermark offset for specifying address within watermark ring buffer.
- */
-struct watermark_mem_offset {
-	/** Index within watermark buffer */
-	uint32_t buff_idx;
-	/** Size of watermark */
-	uint32_t size;
-} CAPTURE_IVC_ALIGN;
-
 /**
  * @brief VI capture descriptor memory information
  *
@@ -2759,7 +2759,7 @@ struct isp_capture_descriptor {
 	struct stats_surface h0_surface;
 	/** Histogram (H1) unit 1 statistics buffer */
 	struct stats_surface h1_surface;
-	/** Histogram (H2) unit 2 statistics buffer for ISP7 only */
+	/** Histogram (H2) unit 2 statistics buffer, for ISP7 only */
 	struct stats_surface h2_surface;
 	/** Pixel Replacement Unit (PRU) statistics buffer */
 	struct stats_surface pru_bad_surface;
@@ -2889,7 +2889,7 @@ struct isp_capture_descriptor_memoryinfo {
 	struct memoryinfo_surface h0_surface;
 	/** Histogram (H1) unit 1 statistics buffer */
 	struct memoryinfo_surface h1_surface;
-	/** Histogram (H2) unit 2 statistics buffer for ISP7 only */
+	/** Histogram (H2) unit 2 statistics buffer for ISP7 only*/
 	struct memoryinfo_surface h2_surface;
 	/** Pixel Replacement Unit (PRU) statistics buffer */
 	struct memoryinfo_surface pru_bad_surface;
diff --git a/include/soc/tegra/camrtc-channels.h b/include/soc/tegra/camrtc-channels.h
index 032bcd10..0964aae0 100644
--- a/include/soc/tegra/camrtc-channels.h
+++ b/include/soc/tegra/camrtc-channels.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES.  All rights reserved.
  */
 
 /**
diff --git a/include/soc/tegra/camrtc-commands.h b/include/soc/tegra/camrtc-commands.h
index 53583349..d80d7711 100644
--- a/include/soc/tegra/camrtc-commands.h
+++ b/include/soc/tegra/camrtc-commands.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES.  All rights reserved.
  */
 
 /**
diff --git a/include/soc/tegra/camrtc-common.h b/include/soc/tegra/camrtc-common.h
index b7c6d91b..9110753d 100644
--- a/include/soc/tegra/camrtc-common.h
+++ b/include/soc/tegra/camrtc-common.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES.  All rights reserved.
  */
 
 /**
@@ -27,16 +27,16 @@
 #define CAMRTC_ALIGN(_n) __attribute__((aligned(_n)))
 #endif
 #ifndef U64_C
-#define U64_C(_x_) (uint64_t)(_x_##ULL)
+#define U64_C(_x_) ((uint64_t)(_x_##ULL))
 #endif
 #ifndef U32_C
-#define U32_C(_x_) (uint32_t)(_x_##UL)
+#define U32_C(_x_) ((uint32_t)(_x_##UL))
 #endif
 #ifndef U16_C
-#define U16_C(_x_) (uint16_t)(_x_##U)
+#define U16_C(_x_) ((uint16_t)(_x_##U))
 #endif
 #ifndef U8_C
-#define U8_C(_x_) (uint8_t)(_x_##U)
+#define U8_C(_x_) ((uint8_t)(_x_##U))
 #endif
 #endif
 
diff --git a/include/soc/tegra/camrtc-dbg-messages.h b/include/soc/tegra/camrtc-dbg-messages.h
index 6112ecdf..9f42bbcd 100644
--- a/include/soc/tegra/camrtc-dbg-messages.h
+++ b/include/soc/tegra/camrtc-dbg-messages.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES.  All rights reserved.
  */
 
 #ifndef INCLUDE_CAMRTC_DBG_MESSAGES_H
diff --git a/include/soc/tegra/camrtc-trace.h b/include/soc/tegra/camrtc-trace.h
index 755ed2f2..36b4ecef 100644
--- a/include/soc/tegra/camrtc-trace.h
+++ b/include/soc/tegra/camrtc-trace.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES.  All rights reserved.
  */
 
 #ifndef INCLUDE_CAMRTC_TRACE_H
@@ -231,7 +231,7 @@ struct camrtc_event_struct {
 
 // camrtc_trace_event_rtos_ids
 #define camrtc_trace_rtos_id(_subid) \
-        CAMRTC_EVENT_MAKE_ID(CAMRTC_EVENT_TYPE_ARRAY, \
+	CAMRTC_EVENT_MAKE_ID(CAMRTC_EVENT_TYPE_ARRAY, \
 		CAMRTC_EVENT_MODULE_RTOS, (_subid))
 #define camrtc_trace_rtos_task_switched_in \
 	camrtc_trace_rtos_id(1)