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pci: tegra264: Add EP driver ICD documentation
JIRA NET-2663 Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com> Change-Id: I5855c28c7834fe6ca8f0571321b04a4997dc6185 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3293557 GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
This commit is contained in:
Nagarjuna Kristam
committed by
Jon Hunter
Jon Hunter
parent
9297cd7cfd
commit
789e70d35e
185
drivers/pci/controller/private-soc/pcie-tegra-calib-info.h
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185
drivers/pci/controller/private-soc/pcie-tegra-calib-info.h
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@@ -0,0 +1,185 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* Copyright (c) 2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved */
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/* No header guards as this file doesnot define any. Added for documentation only */
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/**
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* @defgroup CalPcieEpLinux PCIe_EP_Linux_Device_Tree
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*
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* **PCIe Controller DT properties**
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*
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* `compatible`:
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*
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* - **Description:** Compatibility string name.
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*
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* - **Range:** "nvidia,tegra264-pcie-ep".
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*
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* - **Resolution:**:
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*
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* * Customizable: No.
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*
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* * Optional: No.
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*
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* `status`:
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*
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* - **Description:** Enabled status of PCIe controller.
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*
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* - **Range:** "okay" or "disabled"
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*
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* - **Resolution:**
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*
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* - Customizable: No.
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*
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* * Optional: No.
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*
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* `reg`:
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*
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* - **Description:** A list of physical base address and length pairs for each set of controller
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* registers. Must contain an entry for each entry in the reg-names property in same order.
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*
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* - **Range:** Values for EP Controller (C2, C4, C5) respectively are
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*
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reg = <0xa8 0x08420000 0x0 0x00004000
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0xa8 0x08500000 0x0 0x00001000
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0xa8 0x08510000 0x0 0x00001000
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0xa8 0x08511000 0x0 0x00001000
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0xa8 0x08520000 0x0 0x00010000
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0xa8 0x08430000 0x0 0x00010000
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0xb0 0x80000000 0x8 0x00000000>;
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reg = <0xa8 0x08460000 0x0 0x00004000
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0xa8 0x08530000 0x0 0x00001000
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0xa8 0x08540000 0x0 0x00001000
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0xa8 0x08541000 0x0 0x00001000
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0xa8 0x08550000 0x0 0x00010000
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0xa8 0x08470000 0x0 0x00010000
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0xc0 0x80000000 0x8 0x00000000>;
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reg = <0xa8 0x08480000 0x0 0x00004000
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0xa8 0x08560000 0x0 0x00001000
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0xa8 0x08570000 0x0 0x00001000
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0xa8 0x08571000 0x0 0x00001000
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0xa8 0x08580000 0x0 0x00010000
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0xa8 0x08490000 0x0 0x00010000
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0xc8 0x80000000 0x8 0x00000000>;
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* - **Resolution:**:
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*
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* * Customizable: No.
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*
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* * Optional: No.
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*
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* `reg-names`:
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*
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* - **Description:** Names of the registers defined in `reg` property. Details explained in the
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* range.
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*
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* - **Range:** Must include the following entries in same order:
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* - xal: Controller's application logic registers.
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* - xal-ep-dm: Controller's transport layer
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* - xtl-ep-pri: Controller's transport layer private registers.
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* - xtl-ep-cfg: Controller's PCIe config registers.
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* - xpl: Controller's physical layer registers.
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* - xdma: Controller's XDMA registers.
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* - addr_space: Used to map remote RC address space
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*
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* - **Resolution:**:
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*
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* * Customizable: No.
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*
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* * Optional: No.
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*
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* `intr`:
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*
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* - **Description:** A list of interrupt outputs of the controller. Must contain an entry for
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* each entry in the interrupt-names property
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*
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* - **Range:** Values for EP Controller (C2, C4, C5) are 0x391, 0x3a4 and 0x3ad respectively.
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*
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* - **Resolution:**:
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*
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* * Customizable: No.
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*
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* * Optional: No.
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*
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* `intr-names`:
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*
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* - **Description:** Names of the registers defined in `intr` property. Details explained in the
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* range.
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*
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* - **Range:** Must include the "intr" entry
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*
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* - **Resolution:**:
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*
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* * Customizable: No.
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*
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* * Optional: No.
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*
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* `nvidia,bpmp`:
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*
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* - **Description:** Contains phanldle of bpmp node and controller ID of the PCIe controller.
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*
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* - **Range:** Supported values for controller ID are 2, 4, 5.
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*
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* - **Resolution:**:
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*
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* * Customizable: No.
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*
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* * Optional: No.
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*
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* `dma-coherent`:
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*
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* - **Description:** boolean flag which indicates whether PCIe is DMA coherent or not.
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*
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* - **Resolution:**:
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*
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* * Customizable: No.
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*
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* * Optional: No.
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*
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* `reset-gpios`:
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*
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* - **Description:** Must contain a phandle to a GPIO controller followed by GPIO that is being
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* used as PERST input signal.
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*
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* - **Resolution:**:
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*
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* * Customizable: Yes, based on the platform design.
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*
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* * Optional: No.
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*
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* `nvidia,pex-prsnt-gpios`:
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*
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* - **Description:** Must contain a phandle to a GPIO controller followed by GPIO that is being
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* used as PRSNT output signal.
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* This GPIO is used to generate hot-plug events to the connected root port device.
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*
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* - **Resolution:**:
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*
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* * Customizable: Yes, based on the platform design.
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*
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* * Optional: Yes.
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*
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* Example:
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@verbatim
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pcie-ep@a808460000 {
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status = "disabled";
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compatible = "nvidia,tegra264-pcie-ep";
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reg = <0xa8 0x08460000 0x0 0x00004000
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0xa8 0x08530000 0x0 0x00001000
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0xa8 0x08540000 0x0 0x00001000
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0xa8 0x08541000 0x0 0x00001000
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0xa8 0x08550000 0x0 0x00010000
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0xa8 0x08470000 0x0 0x00010000
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0xc0 0x80000000 0x8 0x00000000>;
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reg-names = "xal", "xal-ep-dm", "xtl-ep-pri", "xtl-ep-cfg", "xdma", "xpl", "addr_space";
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interrupts = <GIC_SPI 0x3a4 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "intr";
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reset-gpios = <&gpio_uphy TEGRA264_UPHY_GPIO(D, 1) GPIO_ACTIVE_LOW>;
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iommus = <&smmu1_mmu 0x40000>;
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dma-coherent;
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msi-parent = <&its 0x140000>;
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nvidia,bpmp = <&bpmp 0x4>;
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};
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@endverbatim
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*/
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@@ -1,5 +1,5 @@
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// SPDX-License-Identifier: GPL-2.0-only
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// SPDX-License-Identifier: GPL-2.0-only
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// SPDX-FileCopyrightText: Copyright (c) 2024, NVIDIA CORPORATION. All rights reserved.
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// SPDX-FileCopyrightText: Copyright (c) 2024-2025, NVIDIA CORPORATION. All rights reserved.
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/*
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/*
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* PCIe EP controller driver for Tegra264 SoC
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* PCIe EP controller driver for Tegra264 SoC
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*
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*
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@@ -29,6 +29,8 @@
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#include <soc/tegra/bpmp.h>
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#include <soc/tegra/bpmp.h>
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#include <soc/tegra/bpmp-abi.h>
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#include <soc/tegra/bpmp-abi.h>
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#include "pcie-tegra264-ep.h"
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/* 5 msec PERST# gpio debounce */
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/* 5 msec PERST# gpio debounce */
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#define PERST_DEBOUNCE_TIME 5000
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#define PERST_DEBOUNCE_TIME 5000
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577
drivers/pci/controller/private-soc/pcie-tegra264-ep.h
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577
drivers/pci/controller/private-soc/pcie-tegra264-ep.h
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@@ -0,0 +1,577 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* Copyright (c) 2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved */
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#ifndef PCIE_TEGRAT264_EP_H
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#define PCIE_TEGRAT264_EP_H
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#ifdef DOXYGEN_ICD
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/**
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* @dir
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* - forward
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*/
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#endif
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/**
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* @brief
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* callback API from Linux System to perform Tegra264 SoC's PCIe EP controller
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* platform driver probe.
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*
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* @param[in] pdev Platform device associated with platform driver.
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*
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* @calib
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* - CAL_NET_PIF$CalPcieEp
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*
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* @usage
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* - Allowed context for the API call
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* - Interrupt: No
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* - Signal handler: No
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* - Thread-Safe: No
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* - Sync/Async: Sync
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* - Re-entrant: No
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* - Required Privileges: None.
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* - Operation Mode
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* - Initialization: Yes
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* - Run time: No
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* - De-initialization: No
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*
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* @return
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* - 0 on success
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* - "negative value" on failure.
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*
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*/
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static int tegra264_pcie_ep_probe(struct platform_device *pdev);
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#ifdef DOXYGEN_ICD
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/**
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* @dir
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* - forward
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*/
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#endif
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/**
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* @brief
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* callback API from Linux System to perform Tegra264 SoC's PCIe EP controller
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* platform driver remove.
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*
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* @param[in] pdev Platform device associated with platform driver.
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*
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* @usage
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* - Allowed context for the API call
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* - Interrupt: No
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* - Signal handler: No
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* - Thread-Safe: No
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* - Sync/Async: Sync
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* - Re-entrant: No
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* - Required Privileges: None.
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* - Operation Mode
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* - Initialization: No
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* - Run time: No
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* - De-initialization: Yes
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*
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* @return
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* - 0 always
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*
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* @outcome
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* - EP controller driver is de-registered.
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* - EP controller is de-initialized(if initialized).
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*/
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#if defined(NV_PLATFORM_DRIVER_STRUCT_REMOVE_RETURNS_VOID) /* Linux v6.11 */
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static void tegra264_pcie_ep_remove_wrapper(struct platform_device *pdev);
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#else
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static int tegra264_pcie_ep_remove_wrapper(struct platform_device *pdev);
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#endif
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#ifdef DOXYGEN_ICD
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/**
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* @dir
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* - forward
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*/
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#endif
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/**
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* @brief
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* callback API from Linux System to perform Tegra264 SoC's PCIe EP controller
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* driver suspend.
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*
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* @param[in] dev Device structure associated with driver.
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*
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* @usage
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* - Allowed context for the API call
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* - Interrupt: No
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* - Signal handler: No
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* - Thread-Safe: No
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* - Sync/Async: Sync
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* - Re-entrant: No
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* - Required Privileges: None.
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* - Operation Mode
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* - Initialization: No
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* - Run time: No
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* - De-initialization: Yes
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*
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* @return
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* - 0 on success
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* - -EPERM if PCIE EP controller is enabled.
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*
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*/
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static int tegra264_pcie_ep_suspend(struct device *dev);
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#ifdef DOXYGEN_ICD
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/**
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* @dir
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* - forward
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*/
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#endif
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/**
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* @brief
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* callback API from Linux System to perform Tegra264 SoC's PCIe EP controller
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* driver resume.
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*
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* @param[in] dev Device structure associated with driver.
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*
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* @usage
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* - Allowed context for the API call
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* - Interrupt: No
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* - Signal handler: No
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* - Thread-Safe: No
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* - Sync/Async: Sync
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* - Re-entrant: No
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* - Required Privileges: None.
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* - Operation Mode
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* - Initialization: Yes
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* - Run time: No
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* - De-initialization: No
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*
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* @return
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* - 0 always
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*
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* @outcome
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* - Reset IRQ is enabled.
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*/
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static int tegra264_pcie_ep_resume(struct device *dev);
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#ifdef DOXYGEN_ICD
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/**
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* @dir
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* - forward
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*/
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#endif
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/**
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* @brief
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* Callback API from PCIe EP controller framework to provide config space header info.
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*
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* @param[in] epc EP controller structure pointer. This is used to retrieve Drive specific
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* internal data structures.
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* @param[in] fn Function number. Unused parameter.
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* @param[in] vfn Virtual Function number. Unused parameter.
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* @param[in] hdr Pointer to the struct pci_epf_header containing header info.
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* Header information supported are:
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* - LSB 7 bits of deviceid.
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* - baseclass_code, subclass_code, progif_code.
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* - Other not supported and ignored.
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*
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* @usage
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* - Allowed context for the API call
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||||||
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* - Interrupt: No
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||||||
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* - Signal handler: No
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||||||
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* - Thread-Safe: No
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||||||
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* - Sync/Async: Sync
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||||||
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* - Re-entrant: No
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||||||
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* - Required Privileges: None.
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* - Operation Mode
|
||||||
|
* - Initialization: Yes
|
||||||
|
* - Run time: Yes
|
||||||
|
* - De-initialization: Yes
|
||||||
|
*
|
||||||
|
* @return
|
||||||
|
* - 0 always.
|
||||||
|
*
|
||||||
|
* @pre
|
||||||
|
* - Must be called before <a href="#tegra264-pcie-ep-start">(tegra264_pcie_ep_start())</a>.
|
||||||
|
* - Failure to call will result in HW power on reset values for header info.
|
||||||
|
*
|
||||||
|
* @outcome
|
||||||
|
* - Header information is configured during EP controller initialization.
|
||||||
|
*/
|
||||||
|
static int tegra264_pcie_ep_write_header(struct pci_epc *epc, u8 fn,
|
||||||
|
#if defined(NV_PCI_EPC_WRITE_HEADER_HAS_VFN_ARG)
|
||||||
|
u8 vfn,
|
||||||
|
#endif
|
||||||
|
struct pci_epf_header *hdr);
|
||||||
|
|
||||||
|
#ifdef DOXYGEN_ICD
|
||||||
|
/**
|
||||||
|
* @dir
|
||||||
|
* - forward
|
||||||
|
*/
|
||||||
|
#endif
|
||||||
|
/**
|
||||||
|
* @brief
|
||||||
|
* Callback API from PCIe EP controller framework to set Bar configuration.
|
||||||
|
*
|
||||||
|
* @param[in] epc EP controller structure pointer. This is used to retrieve Drive specific
|
||||||
|
* internal data structures.
|
||||||
|
* @param[in] fn Function number. Unused parameter.
|
||||||
|
* @param[in] vfn Virtual Function number. Unused parameter.
|
||||||
|
* @param[in] epf_bar Pointer to the struct pci_epf_bar containing BAR configuration.
|
||||||
|
* Supported configuration are:
|
||||||
|
* - Only 64-bit pre-fetch memory type
|
||||||
|
* - Bar number 1 and 2.
|
||||||
|
* - Bar 1 must of minimum 64MB and Max 64GB, must be power of 2.
|
||||||
|
* - Bar 2 must be of size 32MB.
|
||||||
|
*
|
||||||
|
* @usage
|
||||||
|
* - Allowed context for the API call
|
||||||
|
* - Interrupt: No
|
||||||
|
* - Signal handler: No
|
||||||
|
* - Thread-Safe: No
|
||||||
|
* - Sync/Async: Sync
|
||||||
|
* - Re-entrant: No
|
||||||
|
* - Required Privileges: None.
|
||||||
|
* - Operation Mode
|
||||||
|
* - Initialization: Yes
|
||||||
|
* - Run time: Yes
|
||||||
|
* - De-initialization: Yes
|
||||||
|
*
|
||||||
|
* @pre
|
||||||
|
* - Must be called before <a href="#tegra264-pcie-ep-start">(tegra264_pcie_ep_start())</a>.
|
||||||
|
* - Failure to call will result in
|
||||||
|
* <a href="#tegra264-pcie-ep-start">(tegra264_pcie_ep_start())</a> failure.
|
||||||
|
*
|
||||||
|
* @return
|
||||||
|
* - 0 on If Bar details are in range..
|
||||||
|
* - -EINVAL if Bar configuration is not supported
|
||||||
|
*/
|
||||||
|
static int tegra264_pcie_ep_set_bar(struct pci_epc *epc, u8 fn,
|
||||||
|
#if defined(NV_PCI_EPC_WRITE_HEADER_HAS_VFN_ARG)
|
||||||
|
u8 vfn,
|
||||||
|
#endif
|
||||||
|
struct pci_epf_bar *epf_bar);
|
||||||
|
|
||||||
|
#ifdef DOXYGEN_ICD
|
||||||
|
/**
|
||||||
|
* @dir
|
||||||
|
* - forward
|
||||||
|
*/
|
||||||
|
#endif
|
||||||
|
/**
|
||||||
|
* @brief
|
||||||
|
* Callback API from PCIe EP controller framework to clear BAR configuration.
|
||||||
|
*
|
||||||
|
* @param[in] epc EP controller structure pointer. This is used to retrieve Drive specific
|
||||||
|
* internal data structures.
|
||||||
|
* @param[in] fn Function number. Unused parameter.
|
||||||
|
* @param[in] vfn Virtual Function number. Unused parameter.
|
||||||
|
* @param[in] epf_bar Pointer to the struct pci_epf_bar containing BAR configuration.
|
||||||
|
* Supported configuration are:
|
||||||
|
* - BAR number 0 and 1.
|
||||||
|
*
|
||||||
|
* @usage
|
||||||
|
* - Allowed context for the API call
|
||||||
|
* - Interrupt: No
|
||||||
|
* - Signal handler: No
|
||||||
|
* - Thread-Safe: No
|
||||||
|
* - Sync/Async: Sync
|
||||||
|
* - Re-entrant: No
|
||||||
|
* - Required Privileges: None.
|
||||||
|
* - Operation Mode
|
||||||
|
* - Initialization: Yes
|
||||||
|
* - Run time: Yes
|
||||||
|
* - De-initialization: Yes
|
||||||
|
*
|
||||||
|
* @outcome
|
||||||
|
* - BAR mapping details of supported BAR number are cleared.
|
||||||
|
* - No AI taken for unsupported BAR number or when called before controller
|
||||||
|
* is initialized.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
static void tegra264_pcie_ep_clear_bar(struct pci_epc *epc, u8 fn,
|
||||||
|
#if defined(NV_PCI_EPC_WRITE_HEADER_HAS_VFN_ARG)
|
||||||
|
u8 vfn,
|
||||||
|
#endif
|
||||||
|
struct pci_epf_bar *epf_bar);
|
||||||
|
|
||||||
|
#ifdef DOXYGEN_ICD
|
||||||
|
/**
|
||||||
|
* @dir
|
||||||
|
* - forward
|
||||||
|
*/
|
||||||
|
#endif
|
||||||
|
/**
|
||||||
|
* @brief
|
||||||
|
* Callback API from PCIe EP controller framework to map outbound address to controller aperture.
|
||||||
|
*
|
||||||
|
* @param[in] epc EP controller structure pointer. This is used to retrieve Drive specific
|
||||||
|
* internal data structures.
|
||||||
|
* @param[in] func_no Function number. Unused parameter
|
||||||
|
* @param[in] vfunc_no Virtual Function number. Unused parameter
|
||||||
|
* @param[in] addr Host memory address to map.
|
||||||
|
* @param[in] pci_addr Aperture controller address to map 'addr' parameter.
|
||||||
|
* @param[in] size The size of the mapping.
|
||||||
|
*
|
||||||
|
* @usage
|
||||||
|
* - Allowed context for the API call
|
||||||
|
* - Interrupt: No
|
||||||
|
* - Signal handler: No
|
||||||
|
* - Thread-Safe: No
|
||||||
|
* - Sync/Async: Sync
|
||||||
|
* - Re-entrant: No
|
||||||
|
* - Required Privileges: None.
|
||||||
|
* - Operation Mode
|
||||||
|
* - Initialization: Yes
|
||||||
|
* - Run time: Yes
|
||||||
|
* - De-initialization: Yes
|
||||||
|
*
|
||||||
|
* @return
|
||||||
|
* - 0 on success.
|
||||||
|
* - EINVAL if there are no aperture windows available to program the mapping or
|
||||||
|
* if called before controller is initialized.
|
||||||
|
*
|
||||||
|
* @outcome
|
||||||
|
* - On success, mapping details in Tegra264 EP controller register is updated.
|
||||||
|
*/
|
||||||
|
static int tegra264_pcie_ep_map_addr(struct pci_epc *epc, u8 func_no,
|
||||||
|
#if defined(NV_PCI_EPC_WRITE_HEADER_HAS_VFN_ARG)
|
||||||
|
u8 vfunc_no,
|
||||||
|
#endif
|
||||||
|
phys_addr_t addr, u64 pci_addr, size_t size);
|
||||||
|
|
||||||
|
#ifdef DOXYGEN_ICD
|
||||||
|
/**
|
||||||
|
* @dir
|
||||||
|
* - forward
|
||||||
|
*/
|
||||||
|
#endif
|
||||||
|
/**
|
||||||
|
* @brief
|
||||||
|
* Callback API from PCIe EP controller framework to un-map outbound address to
|
||||||
|
* controller aperture.
|
||||||
|
*
|
||||||
|
* @param[in] epc EP controller structure pointer. This is used to retrieve Drive specific
|
||||||
|
* internal data structures.
|
||||||
|
* @param[in] func_no Function number. Unused parameter
|
||||||
|
* @param[in] vfunc_no Virtual Function number. Unused parameter
|
||||||
|
* @param[in] addr Aperture controller address to unmap.
|
||||||
|
*
|
||||||
|
* @usage
|
||||||
|
* - Allowed context for the API call
|
||||||
|
* - Interrupt: No
|
||||||
|
* - Signal handler: No
|
||||||
|
* - Thread-Safe: No
|
||||||
|
* - Sync/Async: Sync
|
||||||
|
* - Re-entrant: No
|
||||||
|
* - Required Privileges: None.
|
||||||
|
* - Operation Mode
|
||||||
|
* - Initialization: Yes
|
||||||
|
* - Run time: Yes
|
||||||
|
* - De-initialization: Yes
|
||||||
|
*
|
||||||
|
* @outcome
|
||||||
|
* - If controller is initialized and Aperture is mapped, then mapping details in Tegra264 EP
|
||||||
|
* controller register is cleared. Else, no AI taken.
|
||||||
|
*/
|
||||||
|
static void tegra264_pcie_ep_unmap_addr(struct pci_epc *epc, u8 func_no,
|
||||||
|
#if defined(NV_PCI_EPC_WRITE_HEADER_HAS_VFN_ARG)
|
||||||
|
u8 vfunc_no,
|
||||||
|
#endif
|
||||||
|
phys_addr_t addr);
|
||||||
|
|
||||||
|
/** MSI is expected not to be decomposed, hence no ICD documentation planned yet */
|
||||||
|
static int tegra264_pcie_ep_set_msi(struct pci_epc *epc, u8 fn,
|
||||||
|
#if defined(NV_PCI_EPC_WRITE_HEADER_HAS_VFN_ARG)
|
||||||
|
u8 vfn,
|
||||||
|
#endif
|
||||||
|
u8 mmc);
|
||||||
|
|
||||||
|
static int tegra264_pcie_ep_get_msi(struct pci_epc *epc,
|
||||||
|
#if defined(NV_PCI_EPC_WRITE_HEADER_HAS_VFN_ARG)
|
||||||
|
u8 fn, u8 vfn);
|
||||||
|
#else
|
||||||
|
u8 fn);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
static int tegra264_pcie_ep_raise_irq(struct pci_epc *epc, u8 fn,
|
||||||
|
#if defined(NV_PCI_EPC_WRITE_HEADER_HAS_VFN_ARG)
|
||||||
|
u8 vfn,
|
||||||
|
#endif
|
||||||
|
#if defined(PCI_EPC_IRQ_TYPE_ENUM_PRESENT) /* Dropped from Linux 6.8 */
|
||||||
|
enum pci_epc_irq_type type,
|
||||||
|
#else
|
||||||
|
unsigned int type,
|
||||||
|
#endif
|
||||||
|
u16 irq_num);
|
||||||
|
|
||||||
|
#ifdef DOXYGEN_ICD
|
||||||
|
/**
|
||||||
|
* @dir
|
||||||
|
* - forward
|
||||||
|
*/
|
||||||
|
#endif
|
||||||
|
/**
|
||||||
|
* @brief
|
||||||
|
* Callback API from PCIe EP controller framework to start EP controller functionality.
|
||||||
|
*
|
||||||
|
* @param[in] epc EP controller structure pointer. This is used to retrieve Drive specific
|
||||||
|
* internal data structures.
|
||||||
|
*
|
||||||
|
* @usage
|
||||||
|
* - Allowed context for the API call
|
||||||
|
* - Interrupt: No
|
||||||
|
* - Signal handler: No
|
||||||
|
* - Thread-Safe: No
|
||||||
|
* - Sync/Async: Sync
|
||||||
|
* - Re-entrant: No
|
||||||
|
* - Required Privileges: None.
|
||||||
|
* - Operation Mode
|
||||||
|
* - Initialization: Yes
|
||||||
|
* - Run time: Yes
|
||||||
|
* - De-initialization: Yes
|
||||||
|
*
|
||||||
|
* @return
|
||||||
|
* - 0 on success.
|
||||||
|
* - -EINVAL if controller is failed to initialize
|
||||||
|
*
|
||||||
|
* @pre
|
||||||
|
* - Must be called after <a href="#tegra264-pcie-ep-set-bar">(tegra264_pcie_ep_set_bar())</a>.
|
||||||
|
*
|
||||||
|
* @outcome
|
||||||
|
* - Tegra264 EP controller is initialized, if
|
||||||
|
* - reset GPIO is already de-asserted.
|
||||||
|
* - pre-conditions met.
|
||||||
|
* - pex-prsnt GPIO is de-asserted if specified in CAL_NET_PIF$CalPcieEp.
|
||||||
|
*/
|
||||||
|
static int tegra264_pcie_ep_start(struct pci_epc *epc);
|
||||||
|
|
||||||
|
#ifdef DOXYGEN_ICD
|
||||||
|
/**
|
||||||
|
* @dir
|
||||||
|
* - forward
|
||||||
|
*/
|
||||||
|
#endif
|
||||||
|
/**
|
||||||
|
* @brief
|
||||||
|
* Callback API from PCIe EP controller framework to stop EP controller functionality.
|
||||||
|
*
|
||||||
|
* @param[in] epc EP controller structure pointer. This is used to retrieve Drive specific
|
||||||
|
* internal data structures.
|
||||||
|
*
|
||||||
|
* @usage
|
||||||
|
* - Allowed context for the API call
|
||||||
|
* - Interrupt: No
|
||||||
|
* - Signal handler: No
|
||||||
|
* - Thread-Safe: No
|
||||||
|
* - Sync/Async: Sync
|
||||||
|
* - Re-entrant: No
|
||||||
|
* - Required Privileges: None.
|
||||||
|
* - Operation Mode
|
||||||
|
* - Initialization: Yes
|
||||||
|
* - Run time: Yes
|
||||||
|
* - De-initialization: Yes
|
||||||
|
*
|
||||||
|
* @outcome
|
||||||
|
* - pex-prsnt GPIO is de-asserted if specified in CAL_NET_PIF$CalPcieEp.
|
||||||
|
* - Tegra264 EP controller is de-initialized, if controller is initialized.
|
||||||
|
*/
|
||||||
|
static void tegra264_pcie_ep_stop(struct pci_epc *epc);
|
||||||
|
|
||||||
|
#ifdef DOXYGEN_ICD
|
||||||
|
/**
|
||||||
|
* @dir
|
||||||
|
* - forward
|
||||||
|
*/
|
||||||
|
#endif
|
||||||
|
/**
|
||||||
|
* @brief
|
||||||
|
* Interrupt Callback API for PCIe EP controller interrupt.
|
||||||
|
*
|
||||||
|
* @param[in] irq un-used data
|
||||||
|
* @param[in] arg This is used to retrieve Drive specific internal data structures.
|
||||||
|
*
|
||||||
|
* @usage
|
||||||
|
* - Allowed context for the API call
|
||||||
|
* - Interrupt: Yes
|
||||||
|
* - Signal handler: No
|
||||||
|
* - Thread-Safe: No
|
||||||
|
* - Sync/Async: Sync
|
||||||
|
* - Re-entrant: No
|
||||||
|
* - Required Privileges: None.
|
||||||
|
* - Operation Mode
|
||||||
|
* - Initialization: Yes
|
||||||
|
* - Run time: Yes
|
||||||
|
* - De-initialization: Yes
|
||||||
|
*
|
||||||
|
* @return
|
||||||
|
* - IRQ_WAKE_THREAD - If interrupt notifies about EP reset state
|
||||||
|
* - IRQ_HANDLED - everything else
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
static irqreturn_t tegra264_pcie_ep_irq_handler(int irq, void *arg);
|
||||||
|
|
||||||
|
#ifdef DOXYGEN_ICD
|
||||||
|
/**
|
||||||
|
* @dir
|
||||||
|
* - forward
|
||||||
|
*/
|
||||||
|
#endif
|
||||||
|
/**
|
||||||
|
* @brief
|
||||||
|
* Threaded interrupt Callback API for PCIe EP controller interrupt.
|
||||||
|
*
|
||||||
|
* @param[in] irq un-used data
|
||||||
|
* @param[in] arg This is used to retrieve Drive specific internal data structures.
|
||||||
|
*
|
||||||
|
* @usage
|
||||||
|
* - Allowed context for the API call
|
||||||
|
* - Interrupt: Yes
|
||||||
|
* - Signal handler: No
|
||||||
|
* - Thread-Safe: No
|
||||||
|
* - Sync/Async: Sync
|
||||||
|
* - Re-entrant: No
|
||||||
|
* - Required Privileges: None.
|
||||||
|
* - Operation Mode
|
||||||
|
* - Initialization: Yes
|
||||||
|
* - Run time: Yes
|
||||||
|
* - De-initialization: Yes
|
||||||
|
*
|
||||||
|
* @return
|
||||||
|
* - IRQ_HANDLED - always
|
||||||
|
*
|
||||||
|
* @outcome
|
||||||
|
* - PCIe EP controller is de-initialized and initialized.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
static irqreturn_t tegra264_pcie_ep_irq_thread(int irq, void *arg);
|
||||||
|
|
||||||
|
#ifdef DOXYGEN_ICD
|
||||||
|
/**
|
||||||
|
* @dir
|
||||||
|
* - forward
|
||||||
|
*/
|
||||||
|
#endif
|
||||||
|
/**
|
||||||
|
* @brief
|
||||||
|
* Interrupt Callback API for PCIe EP reset-gpio changes.
|
||||||
|
*
|
||||||
|
* @param[in] irq un-used data
|
||||||
|
* @param[in] arg This is used to retrieve Drive specific internal data structures.
|
||||||
|
*
|
||||||
|
* @usage
|
||||||
|
* - Allowed context for the API call
|
||||||
|
* - Interrupt: Yes
|
||||||
|
* - Signal handler: No
|
||||||
|
* - Thread-Safe: No
|
||||||
|
* - Sync/Async: Sync
|
||||||
|
* - Re-entrant: No
|
||||||
|
* - Required Privileges: None.
|
||||||
|
* - Operation Mode
|
||||||
|
* - Initialization: Yes
|
||||||
|
* - Run time: Yes
|
||||||
|
* - De-initialization: Yes
|
||||||
|
*
|
||||||
|
* @return
|
||||||
|
* - IRQ_HANDLED - always
|
||||||
|
*
|
||||||
|
* @outcome
|
||||||
|
* - PCIe EP controller is de-initialized if reset GPIO status is asserted.
|
||||||
|
* - PCIe EP controller is Initialized if reset GPIO status and pex-prsnt GPIO
|
||||||
|
* are de-asserted.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
static irqreturn_t tegra264_pcie_ep_rst_irq(int irq, void *arg);
|
||||||
|
#endif /* PCIE_TEGRAT264_EP_H */
|
||||||
Reference in New Issue
Block a user