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ASoC: tegra-alt: Support dynamic pinmux for dspk

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Support dynamic pinmux settings for dspk, this change will help
to runtime configure the pinmux register to use pinmuxed path.

Change-Id: Ie87499a822854d8f077530f49d5516883c987839
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Reviewed-on: http://git-master/r/1181859
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
This commit is contained in:
Mohan Kumar
2016-07-15 11:16:04 +05:30
committed by Sameer Pujar
parent 2c5128e5f8
commit 78f9429384
1 changed files with 59 additions and 3 deletions
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62
sound/soc/tegra-alt/tegra186_dspk_alt.c
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@@ -31,6 +31,7 @@
#include <linux/of_device.h> #include <linux/of_device.h>
#include <linux/debugfs.h> #include <linux/debugfs.h>
#include <linux/tegra-soc.h> #include <linux/tegra-soc.h>
#include <linux/pinctrl/consumer.h>
#include <linux/pinctrl/pinconf-tegra.h> #include <linux/pinctrl/pinconf-tegra.h>
#include "tegra210_xbar_alt.h" #include "tegra210_xbar_alt.h"
@@ -62,11 +63,21 @@ static const struct reg_default tegra186_dspk_reg_defaults[] = {
static int tegra186_dspk_runtime_suspend(struct device *dev) static int tegra186_dspk_runtime_suspend(struct device *dev)
{ {
struct tegra186_dspk *dspk = dev_get_drvdata(dev); struct tegra186_dspk *dspk = dev_get_drvdata(dev);
int ret;
regcache_cache_only(dspk->regmap, true); regcache_cache_only(dspk->regmap, true);
regcache_mark_dirty(dspk->regmap); regcache_mark_dirty(dspk->regmap);
if (!(tegra_platform_is_unit_fpga() || tegra_platform_is_fpga())) if (!(tegra_platform_is_unit_fpga() || tegra_platform_is_fpga())) {
if (!IS_ERR(dspk->pin_idle_state) && dspk->is_pinctrl) {
ret = pinctrl_select_state(
dspk->pinctrl, dspk->pin_idle_state);
if (ret < 0)
dev_err(dev,
"setting dap pinctrl idle state failed\n");
}
clk_disable_unprepare(dspk->clk_dspk); clk_disable_unprepare(dspk->clk_dspk);
}
pm_runtime_put_sync(dev->parent); pm_runtime_put_sync(dev->parent);
return 0; return 0;
@@ -84,6 +95,14 @@ static int tegra186_dspk_runtime_resume(struct device *dev)
} }
if (!(tegra_platform_is_unit_fpga() || tegra_platform_is_fpga())) { if (!(tegra_platform_is_unit_fpga() || tegra_platform_is_fpga())) {
if (!IS_ERR(dspk->pin_active_state) && dspk->is_pinctrl) {
ret = pinctrl_select_state(dspk->pinctrl,
dspk->pin_active_state);
if (ret < 0)
dev_err(dev,
"setting dap pinctrl active state failed\n");
}
ret = clk_prepare_enable(dspk->clk_dspk); ret = clk_prepare_enable(dspk->clk_dspk);
if (ret) { if (ret) {
dev_err(dev, "clk_enable failed: %d\n", ret); dev_err(dev, "clk_enable failed: %d\n", ret);
@@ -461,9 +480,46 @@ static int tegra186_dspk_platform_probe(struct platform_device *pdev)
goto err_suspend; goto err_suspend;
} }
if (of_property_read_string(np, "prod-name", &prod_name) == 0) if (of_property_read_string(np, "prod-name", &prod_name) == 0) {
tegra_pinctrl_config_prod(&pdev->dev, prod_name); ret = tegra_pinctrl_config_prod(&pdev->dev, prod_name);
if (ret < 0)
dev_warn(&pdev->dev, "Failed to set %s setting\n",
prod_name);
}
if (of_property_read_u32(np, "nvidia,is-pinctrl",
&dspk->is_pinctrl) < 0)
dspk->is_pinctrl = 0;
if (dspk->is_pinctrl) {
dspk->pinctrl = devm_pinctrl_get(&pdev->dev);
if (IS_ERR(dspk->pinctrl)) {
dev_warn(&pdev->dev, "Missing pinctrl device\n");
goto err_dap;
}
dspk->pin_active_state = pinctrl_lookup_state(dspk->pinctrl,
"dap_active");
if (IS_ERR(dspk->pin_active_state)) {
dev_warn(&pdev->dev, "Missing dap-active state\n");
goto err_dap;
}
dspk->pin_idle_state = pinctrl_lookup_state(dspk->pinctrl,
"dap_inactive");
if (IS_ERR(dspk->pin_idle_state)) {
dev_warn(&pdev->dev, "Missing dap-inactive state\n");
goto err_dap;
}
ret = pinctrl_select_state(dspk->pinctrl, dspk->pin_idle_state);
if (ret < 0) {
dev_err(&pdev->dev, "setting state failed\n");
goto err_dap;
}
}
err_dap:
dev_set_drvdata(&pdev->dev, dspk); dev_set_drvdata(&pdev->dev, dspk);
return 0; return 0;