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ASoC: tegra-alt: fix coverity defect 33507
Clean up the code as this part of code is not valid now. Coverity ID 33507 Bug 200192147 Change-Id: I6f9ce32a5a52c616838649826bce72aba848d8c2 Signed-off-by: Mohan Kumar <mkumard@nvidia.com> Reviewed-on: http://git-master/r/1260422 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Sameer Pujar <spujar@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
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committed by
Sameer Pujar
parent
f16184f16f
commit
7a4067a6c3
@@ -777,11 +777,6 @@ static const struct of_device_id tegra210_xbar_of_match[] = {
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{},
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{},
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};
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};
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static const struct {
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const char *clk_name;
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} configlink_clocks[] = {
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};
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#if defined(CONFIG_ARCH_TEGRA_21x_SOC)
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#if defined(CONFIG_ARCH_TEGRA_21x_SOC)
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static struct of_dev_auxdata tegra210_xbar_auxdata[] = {
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static struct of_dev_auxdata tegra210_xbar_auxdata[] = {
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OF_DEV_AUXDATA("nvidia,tegra210-admaif", ADMAIF_BASE_ADDR, "tegra210-admaif", NULL),
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OF_DEV_AUXDATA("nvidia,tegra210-admaif", ADMAIF_BASE_ADDR, "tegra210-admaif", NULL),
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@@ -863,9 +858,8 @@ static int tegra210_xbar_registration(struct platform_device *pdev)
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static int tegra210_xbar_probe(struct platform_device *pdev)
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static int tegra210_xbar_probe(struct platform_device *pdev)
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{
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{
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struct clk *clk;
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void __iomem *regs;
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void __iomem *regs;
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int ret, i;
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int ret;
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const struct of_device_id *match;
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const struct of_device_id *match;
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struct tegra210_xbar_soc_data *soc_data;
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struct tegra210_xbar_soc_data *soc_data;
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struct resource *res;
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struct resource *res;
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@@ -879,24 +873,6 @@ static int tegra210_xbar_probe(struct platform_device *pdev)
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}
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}
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soc_data = (struct tegra210_xbar_soc_data *)match->data;
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soc_data = (struct tegra210_xbar_soc_data *)match->data;
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/*
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* The TEGRA APE XBAR client a register bus: the "configlink".
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* For this to operate correctly, all devices on this bus must
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* be out of reset.
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* Ensure that here.
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*/
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for (i = 0; i < ARRAY_SIZE(configlink_clocks); i++) {
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clk = devm_clk_get(&pdev->dev, configlink_clocks[i].clk_name);
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if (IS_ERR(clk)) {
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dev_err(&pdev->dev, "Can't get clock %s\n",
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configlink_clocks[i].clk_name);
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ret = PTR_ERR(clk);
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goto err;
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}
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tegra_periph_reset_deassert(clk);
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devm_clk_put(&pdev->dev, clk);
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}
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xbar = devm_kzalloc(&pdev->dev, sizeof(*xbar), GFP_KERNEL);
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xbar = devm_kzalloc(&pdev->dev, sizeof(*xbar), GFP_KERNEL);
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if (!xbar) {
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if (!xbar) {
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dev_err(&pdev->dev, "Can't allocate xbar\n");
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dev_err(&pdev->dev, "Can't allocate xbar\n");
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