diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index fe883209..20af0cf3 100644
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -2289,6 +2289,8 @@ static void tegra_crtc_atomic_begin(struct drm_crtc *crtc,
 
 		crtc->state->event = NULL;
 	}
+
+	tegra_dc_disable_vblank(crtc);
 }
 
 static void tegra_crtc_atomic_flush(struct drm_crtc *crtc,
@@ -2315,6 +2317,8 @@ static void tegra_crtc_atomic_flush(struct drm_crtc *crtc,
 	value = dc_state->planes | GENERAL_ACT_REQ;
 	tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL);
 	value = tegra_dc_readl(dc, DC_CMD_STATE_CONTROL);
+
+	tegra_dc_enable_vblank(crtc);
 }
 
 static bool tegra_plane_is_cursor(const struct drm_plane_state *state)
@@ -2527,9 +2531,10 @@ static const struct drm_crtc_helper_funcs tegra_crtc_helper_funcs = {
 static irqreturn_t tegra_dc_irq(int irq, void *data)
 {
 	struct tegra_dc *dc = data;
-	unsigned long status;
+	u32 status, value, mask;
 
-	status = tegra_dc_readl(dc, DC_CMD_INT_STATUS);
+	mask = tegra_dc_readl(dc, DC_CMD_INT_MASK);
+	status = tegra_dc_readl(dc, DC_CMD_INT_STATUS) & mask;
 	tegra_dc_writel(dc, status, DC_CMD_INT_STATUS);
 
 	if (status & FRAME_END_INT) {
@@ -2544,7 +2549,9 @@ static irqreturn_t tegra_dc_irq(int irq, void *data)
 		/*
 		dev_dbg(dc->dev, "%s(): vertical blank\n", __func__);
 		*/
-		drm_crtc_handle_vblank(&dc->base);
+		value = tegra_dc_readl(dc, DC_CMD_STATE_CONTROL);
+		if (!value)
+			drm_crtc_handle_vblank(&dc->base);
 		dc->stats.vblank_total++;
 		dc->stats.vblank++;
 	}