mirror of
git://nv-tegra.nvidia.com/linux-nv-oot.git
synced 2025-12-22 09:11:26 +03:00
nvdla: kmd: Move falcon implementation from Host1x to DLA driver
This commit moves the falcon hardware interface implementation from the host1x-nvhost driver to the NVDLA kernel driver. This change makes the DLA driver more independent by removing its dependency on the host1x driver for falcon functionality. The falcon hardware interface is critical for DLA firmware loading and execution. By moving this code into the DLA driver, we improve modularity and make the driver more self-contained. Changes include: - Migrated falcon.c and falcon.h from host1x-nvhost to video/tegra/host/nvdla/flcn/ - Renamed files to nvdla_falcon.c and nvdla_falcon.h - Added DLA-specific falcon API implementations - Updated include paths and header guards - Updated the DLA driver's Makefile to include the new files Jira HOSTX-5933 Bug 4918838 Change-Id: Icb3731c4556545f98c7eb62e9e56c0396c7b6b3b Signed-off-by: Mainak Sen <msen@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3311297 Reviewed-by: Arvind M <am@nvidia.com> GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com> Reviewed-by: Raghavendra Vishnu Kumar <rvk@nvidia.com>
This commit is contained in:
Mainak Sen
@@ -23,7 +23,8 @@ nvhost-nvdla-objs += \
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$(NVDLA_COMMON_OBJS) \
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$(NVDLA_COMMON_OBJS) \
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port/device/nvdla_device_host1x.o \
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port/device/nvdla_device_host1x.o \
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port/fw/nvdla_fw_flcn.o \
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port/fw/nvdla_fw_flcn.o \
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port/sync/nvdla_sync_syncpt.o
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port/sync/nvdla_sync_syncpt.o \
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port/fw/nvdla_falcon.o
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ifdef CONFIG_TEGRA_GRHOST
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ifdef CONFIG_TEGRA_GRHOST
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nvhost-nvdla-objs += dla_channel.o
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nvhost-nvdla-objs += dla_channel.o
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384
drivers/video/tegra/host/nvdla/port/fw/nvdla_falcon.c
Normal file
384
drivers/video/tegra/host/nvdla/port/fw/nvdla_falcon.c
Normal file
@@ -0,0 +1,384 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2015-2023, NVIDIA Corporation. All rights reserved.
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*/
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#include "nvdla_falcon.h"
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#include "../../port/nvdla_host_wrapper.h"
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/firmware.h>
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#include <linux/pci_ids.h>
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#include <linux/iopoll.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/iommu.h>
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enum falcon_memory {
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FALCON_MEMORY_IMEM,
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FALCON_MEMORY_DATA,
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};
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static void falcon_writel(struct falcon *falcon, u32 value, u32 offset)
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{
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writel(value, falcon->regs + offset);
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}
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static int falcon_wait_idle(struct falcon *falcon)
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{
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u32 value;
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return readl_poll_timeout(falcon->regs + FALCON_IDLESTATE, value,
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(value == 0), 10, 100000);
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}
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static int falcon_dma_wait_idle(struct falcon *falcon)
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{
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u32 value;
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return readl_poll_timeout(falcon->regs + FALCON_DMATRFCMD, value,
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(value & FALCON_DMATRFCMD_IDLE), 10, 100000);
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}
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static int falcon_copy_chunk(struct falcon *falcon,
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phys_addr_t base,
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unsigned long offset,
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enum falcon_memory target)
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{
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u32 cmd = FALCON_DMATRFCMD_SIZE_256B;
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if (target == FALCON_MEMORY_IMEM)
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cmd |= FALCON_DMATRFCMD_IMEM;
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falcon_writel(falcon, offset, FALCON_DMATRFMOFFS);
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falcon_writel(falcon, base, FALCON_DMATRFFBOFFS);
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falcon_writel(falcon, cmd, FALCON_DMATRFCMD);
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return falcon_dma_wait_idle(falcon);
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}
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static void falcon_copy_firmware_image(struct falcon *falcon,
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const struct firmware *firmware)
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{
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u32 *virt = falcon->firmware.virt;
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size_t i;
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/* copy the whole thing taking into account endianness */
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for (i = 0; i < firmware->size / sizeof(u32); i++)
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virt[i] = le32_to_cpu(((__le32 *)firmware->data)[i]);
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}
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static int falcon_parse_firmware_image(struct falcon *falcon)
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{
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struct falcon_fw_bin_header_v1 *bin = (void *)falcon->firmware.virt;
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struct falcon_fw_os_header_v1 *os;
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/* endian problems would show up right here */
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if (bin->magic != PCI_VENDOR_ID_NVIDIA && bin->magic != 0x10fe) {
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dev_err(falcon->dev, "incorrect firmware magic\n");
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return -EINVAL;
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}
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/* currently only version 1 is supported */
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if (bin->version != 1) {
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dev_err(falcon->dev, "unsupported firmware version\n");
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return -EINVAL;
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}
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/* check that the firmware size is consistent */
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if (bin->size > falcon->firmware.size) {
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dev_err(falcon->dev, "firmware image size inconsistency\n");
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return -EINVAL;
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}
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os = falcon->firmware.virt + bin->os_header_offset;
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falcon->firmware.bin_data.size = bin->os_size;
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falcon->firmware.bin_data.offset = bin->os_data_offset;
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falcon->firmware.code.offset = os->code_offset;
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falcon->firmware.code.size = os->code_size;
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falcon->firmware.data.offset = os->data_offset;
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falcon->firmware.data.size = os->data_size;
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return 0;
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}
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static int falcon_read_firmware(struct falcon *falcon, const char *name)
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{
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int err, retry_count=10;
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retry_request:
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/* request_firmware prints error if it fails */
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err = request_firmware_direct(&falcon->firmware.firmware, name, falcon->dev);
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if (err == -EINTR && retry_count) {
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retry_count--;
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goto retry_request;
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}
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if (err < 0)
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return err;
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falcon->firmware.size = falcon->firmware.firmware->size;
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return 0;
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}
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static int falcon_load_firmware(struct falcon *falcon)
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{
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const struct firmware *firmware = falcon->firmware.firmware;
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int err;
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/* copy firmware image into local area. this also ensures endianness */
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falcon_copy_firmware_image(falcon, firmware);
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/* parse the image data */
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err = falcon_parse_firmware_image(falcon);
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if (err < 0) {
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dev_err(falcon->dev, "failed to parse firmware image\n");
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return err;
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}
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release_firmware(firmware);
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falcon->firmware.firmware = NULL;
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return 0;
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}
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static int falcon_init(struct falcon *falcon)
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{
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falcon->firmware.virt = NULL;
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return 0;
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}
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static int falcon_boot(struct falcon *falcon)
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{
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unsigned long offset;
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u32 value;
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int err;
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if (!falcon->firmware.virt)
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return -EINVAL;
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err = readl_poll_timeout(falcon->regs + FALCON_DMACTL, value,
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(value & (FALCON_DMACTL_IMEM_SCRUBBING |
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FALCON_DMACTL_DMEM_SCRUBBING)) == 0,
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10, 10000);
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if (err < 0)
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return err;
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falcon_writel(falcon, 0, FALCON_DMACTL);
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/* setup the address of the binary data so Falcon can access it later */
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falcon_writel(falcon, (falcon->firmware.iova +
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falcon->firmware.bin_data.offset) >> 8,
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FALCON_DMATRFBASE);
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/* copy the data segment into Falcon internal memory */
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for (offset = 0; offset < falcon->firmware.data.size; offset += 256)
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falcon_copy_chunk(falcon,
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falcon->firmware.data.offset + offset,
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offset, FALCON_MEMORY_DATA);
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/* copy the code segment into Falcon internal memory */
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for (offset = 0; offset < falcon->firmware.code.size; offset += 256)
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falcon_copy_chunk(falcon, falcon->firmware.code.offset + offset,
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offset, FALCON_MEMORY_IMEM);
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/* enable interface */
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falcon_writel(falcon, FALCON_ITFEN_MTHDEN |
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FALCON_ITFEN_CTXEN,
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FALCON_ITFEN);
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/* boot falcon */
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falcon_writel(falcon, 0x00000000, FALCON_BOOTVEC);
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falcon_writel(falcon, FALCON_CPUCTL_STARTCPU, FALCON_CPUCTL);
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err = falcon_wait_idle(falcon);
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if (err < 0) {
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dev_err(falcon->dev, "Falcon boot failed due to timeout\n");
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return err;
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}
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return 0;
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}
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/* NVDLA Falcon API implementations */
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/**
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* ISR for falcon
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*/
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static irqreturn_t nvdla_flcn_isr(int irq, void *dev_id)
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{
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struct platform_device *pdev = dev_id;
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struct nvhost_device_data *pdata = platform_get_drvdata(pdev);
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if (pdata->flcn_isr)
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pdata->flcn_isr(pdev);
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return IRQ_HANDLED;
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}
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/**
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* Initialize the interrupt for DLA falcon
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*/
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int nvdla_flcn_intr_init(struct platform_device *pdev)
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{
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struct nvhost_device_data *pdata = platform_get_drvdata(pdev);
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int ret = 0;
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pdata->irq = platform_get_irq(pdev, 0);
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if (pdata->irq < 0) {
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dev_err(&pdev->dev, "failed to get IRQ\n");
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return -ENXIO;
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}
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ret = devm_request_irq(&pdev->dev, pdata->irq, nvdla_flcn_isr, 0,
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dev_name(&pdev->dev), pdev);
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if (ret) {
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dev_err(&pdev->dev, "failed to request irq. err %d\n", ret);
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return ret;
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}
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/* keep irq disabled */
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disable_irq(pdata->irq);
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return 0;
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}
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/**
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* Reload firmware for DLA falcon
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|
*/
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int nvdla_flcn_reload_fw(struct platform_device *pdev)
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|
{
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|
/* TODO: Used by debugfs */
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return -EOPNOTSUPP;
|
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|
}
|
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|
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/**
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* Initialize DLA falcon
|
||||||
|
*/
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static int nvdla_flcn_init(struct platform_device *pdev,
|
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|
struct nvhost_device_data *pdata)
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||||||
|
{
|
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struct falcon *falcon;
|
||||||
|
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|
falcon = devm_kzalloc(&pdev->dev, sizeof(*falcon), GFP_KERNEL);
|
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|
if (!falcon)
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|
return -ENOMEM;
|
||||||
|
|
||||||
|
falcon->dev = &pdev->dev;
|
||||||
|
falcon->regs = pdata->aperture[0];
|
||||||
|
|
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|
falcon_init(falcon);
|
||||||
|
|
||||||
|
pdata->falcon_data = falcon;
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Prepare DLA falcon for power off
|
||||||
|
*/
|
||||||
|
int nvdla_flcn_prepare_poweroff(struct platform_device *pdev)
|
||||||
|
{
|
||||||
|
struct nvhost_device_data *pdata = platform_get_drvdata(pdev);
|
||||||
|
|
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if (pdata->flcn_isr)
|
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|
disable_irq(pdata->irq);
|
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|
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|
return 0;
|
||||||
|
}
|
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|
|
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|
/**
|
||||||
|
* Load firmware for DLA falcon
|
||||||
|
*/
|
||||||
|
static int nvdla_flcn_load_firmware(struct platform_device *pdev,
|
||||||
|
struct falcon *falcon,
|
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|
char *firmware_name)
|
||||||
|
{
|
||||||
|
dma_addr_t iova;
|
||||||
|
size_t size;
|
||||||
|
void *virt;
|
||||||
|
int err;
|
||||||
|
|
||||||
|
if (falcon->firmware.virt)
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
err = falcon_read_firmware(falcon, firmware_name);
|
||||||
|
if (err < 0)
|
||||||
|
return err;
|
||||||
|
|
||||||
|
size = falcon->firmware.size;
|
||||||
|
virt = dma_alloc_coherent(&pdev->dev, size, &iova, GFP_KERNEL);
|
||||||
|
if (!virt)
|
||||||
|
return -ENOMEM;
|
||||||
|
|
||||||
|
falcon->firmware.virt = virt;
|
||||||
|
falcon->firmware.iova = iova;
|
||||||
|
|
||||||
|
err = falcon_load_firmware(falcon);
|
||||||
|
if (err < 0)
|
||||||
|
goto cleanup;
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
cleanup:
|
||||||
|
dma_free_coherent(&pdev->dev, size, virt, iova);
|
||||||
|
|
||||||
|
return err;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Finalize DLA falcon power on
|
||||||
|
*/
|
||||||
|
int nvdla_flcn_finalize_poweron(struct platform_device *pdev)
|
||||||
|
{
|
||||||
|
struct nvhost_device_data *pdata = platform_get_drvdata(pdev);
|
||||||
|
#ifdef CONFIG_IOMMU_API
|
||||||
|
struct iommu_fwspec *spec = dev_iommu_fwspec_get(&pdev->dev);
|
||||||
|
#endif
|
||||||
|
struct falcon *falcon;
|
||||||
|
int err;
|
||||||
|
u32 value;
|
||||||
|
|
||||||
|
if (!pdata->falcon_data) {
|
||||||
|
err = nvdla_flcn_init(pdev, pdata);
|
||||||
|
if (err < 0)
|
||||||
|
return -ENOMEM;
|
||||||
|
}
|
||||||
|
|
||||||
|
falcon = pdata->falcon_data;
|
||||||
|
|
||||||
|
err = nvdla_flcn_load_firmware(pdev, falcon, pdata->firmware_name);
|
||||||
|
if (err < 0)
|
||||||
|
return err;
|
||||||
|
|
||||||
|
#ifdef CONFIG_IOMMU_API
|
||||||
|
if (spec) {
|
||||||
|
host1x_writel(pdev, pdata->transcfg_addr, pdata->transcfg_val);
|
||||||
|
|
||||||
|
if (spec->num_ids > 0) {
|
||||||
|
value = spec->ids[0] & 0xffff;
|
||||||
|
host1x_writel(pdev, THI_STREAMID0, value);
|
||||||
|
host1x_writel(pdev, THI_STREAMID1, value);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
err = falcon_boot(falcon);
|
||||||
|
if (err < 0)
|
||||||
|
return err;
|
||||||
|
|
||||||
|
err = falcon_wait_idle(falcon);
|
||||||
|
if (err < 0) {
|
||||||
|
dev_err(&pdev->dev, "falcon boot timed out\n");
|
||||||
|
return err;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (pdata->flcn_isr)
|
||||||
|
enable_irq(pdata->irq);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
120
drivers/video/tegra/host/nvdla/port/fw/nvdla_falcon.h
Normal file
120
drivers/video/tegra/host/nvdla/port/fw/nvdla_falcon.h
Normal file
@@ -0,0 +1,120 @@
|
|||||||
|
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2015-2022, NVIDIA Corporation. All rights reserved.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _NVDLA_PORT_FW_FALCON_H_
|
||||||
|
#define _NVDLA_PORT_FW_FALCON_H_
|
||||||
|
|
||||||
|
#include <linux/types.h>
|
||||||
|
#include <linux/platform_device.h>
|
||||||
|
|
||||||
|
/* Forward declaration for nvhost_device_data */
|
||||||
|
struct nvhost_device_data;
|
||||||
|
|
||||||
|
#define FALCON_UCLASS_METHOD_OFFSET 0x00000040
|
||||||
|
|
||||||
|
#define FALCON_UCLASS_METHOD_DATA 0x00000044
|
||||||
|
|
||||||
|
#define FALCON_IRQMSET 0x00001010
|
||||||
|
#define FALCON_IRQMSET_WDTMR (1 << 1)
|
||||||
|
#define FALCON_IRQMSET_HALT (1 << 4)
|
||||||
|
#define FALCON_IRQMSET_EXTERR (1 << 5)
|
||||||
|
#define FALCON_IRQMSET_SWGEN0 (1 << 6)
|
||||||
|
#define FALCON_IRQMSET_SWGEN1 (1 << 7)
|
||||||
|
#define FALCON_IRQMSET_EXT(v) (((v) & 0xff) << 8)
|
||||||
|
|
||||||
|
#define FALCON_IRQDEST 0x0000101c
|
||||||
|
#define FALCON_IRQDEST_HALT (1 << 4)
|
||||||
|
#define FALCON_IRQDEST_EXTERR (1 << 5)
|
||||||
|
#define FALCON_IRQDEST_SWGEN0 (1 << 6)
|
||||||
|
#define FALCON_IRQDEST_SWGEN1 (1 << 7)
|
||||||
|
#define FALCON_IRQDEST_EXT(v) (((v) & 0xff) << 8)
|
||||||
|
|
||||||
|
#define FALCON_ITFEN 0x00001048
|
||||||
|
#define FALCON_ITFEN_CTXEN (1 << 0)
|
||||||
|
#define FALCON_ITFEN_MTHDEN (1 << 1)
|
||||||
|
|
||||||
|
#define FALCON_IDLESTATE 0x0000104c
|
||||||
|
|
||||||
|
#define FALCON_CPUCTL 0x00001100
|
||||||
|
#define FALCON_CPUCTL_STARTCPU (1 << 1)
|
||||||
|
|
||||||
|
#define FALCON_BOOTVEC 0x00001104
|
||||||
|
|
||||||
|
#define FALCON_DMACTL 0x0000110c
|
||||||
|
#define FALCON_DMACTL_DMEM_SCRUBBING (1 << 1)
|
||||||
|
#define FALCON_DMACTL_IMEM_SCRUBBING (1 << 2)
|
||||||
|
|
||||||
|
#define FALCON_DMATRFBASE 0x00001110
|
||||||
|
|
||||||
|
#define FALCON_DMATRFMOFFS 0x00001114
|
||||||
|
|
||||||
|
#define FALCON_DMATRFCMD 0x00001118
|
||||||
|
#define FALCON_DMATRFCMD_IDLE (1 << 1)
|
||||||
|
#define FALCON_DMATRFCMD_IMEM (1 << 4)
|
||||||
|
#define FALCON_DMATRFCMD_SIZE_256B (6 << 8)
|
||||||
|
|
||||||
|
#define FALCON_DMATRFFBOFFS 0x0000111c
|
||||||
|
|
||||||
|
/* THI register definitions */
|
||||||
|
#define THI_STREAMID0 0x00000030
|
||||||
|
#define THI_STREAMID1 0x00000034
|
||||||
|
|
||||||
|
struct falcon_fw_bin_header_v1 {
|
||||||
|
u32 magic; /* 0x10de */
|
||||||
|
u32 version; /* version of bin format (1) */
|
||||||
|
u32 size; /* entire image size including this header */
|
||||||
|
u32 os_header_offset;
|
||||||
|
u32 os_data_offset;
|
||||||
|
u32 os_size;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct falcon_fw_os_app_v1 {
|
||||||
|
u32 offset;
|
||||||
|
u32 size;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct falcon_fw_os_header_v1 {
|
||||||
|
u32 code_offset;
|
||||||
|
u32 code_size;
|
||||||
|
u32 data_offset;
|
||||||
|
u32 data_size;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct falcon_firmware_section {
|
||||||
|
unsigned long offset;
|
||||||
|
size_t size;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct falcon_firmware {
|
||||||
|
/* Firmware after it is read but not loaded */
|
||||||
|
const struct firmware *firmware;
|
||||||
|
|
||||||
|
/* Raw firmware data */
|
||||||
|
dma_addr_t iova;
|
||||||
|
dma_addr_t phys;
|
||||||
|
void *virt;
|
||||||
|
size_t size;
|
||||||
|
|
||||||
|
/* Parsed firmware information */
|
||||||
|
struct falcon_firmware_section bin_data;
|
||||||
|
struct falcon_firmware_section data;
|
||||||
|
struct falcon_firmware_section code;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct falcon {
|
||||||
|
/* Set by falcon client */
|
||||||
|
struct device *dev;
|
||||||
|
void __iomem *regs;
|
||||||
|
|
||||||
|
struct falcon_firmware firmware;
|
||||||
|
};
|
||||||
|
|
||||||
|
/* NVDLA Falcon API functions */
|
||||||
|
int nvdla_flcn_intr_init(struct platform_device *pdev);
|
||||||
|
int nvdla_flcn_reload_fw(struct platform_device *pdev);
|
||||||
|
int nvdla_flcn_prepare_poweroff(struct platform_device *pdev);
|
||||||
|
int nvdla_flcn_finalize_poweron(struct platform_device *pdev);
|
||||||
|
|
||||||
|
#endif /* _NVDLA_PORT_FW_FALCON_H_ */
|
||||||
@@ -1,5 +1,5 @@
|
|||||||
// SPDX-License-Identifier: GPL-2.0-only
|
// SPDX-License-Identifier: GPL-2.0-only
|
||||||
/* SPDX-FileCopyrightText: Copyright (c) 2024-2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
/* SPDX-FileCopyrightText: Copyright (c) 2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||||
*
|
*
|
||||||
* NVDLA KMD-FALCON implementation
|
* NVDLA KMD-FALCON implementation
|
||||||
*/
|
*/
|
||||||
@@ -12,6 +12,7 @@
|
|||||||
#include "../../nvdla.h"
|
#include "../../nvdla.h"
|
||||||
#include "../../nvdla_debug.h"
|
#include "../../nvdla_debug.h"
|
||||||
#include "../../nvdla_hw_flcn.h"
|
#include "../../nvdla_hw_flcn.h"
|
||||||
|
#include "nvdla_falcon.h"
|
||||||
|
|
||||||
#include <linux/completion.h>
|
#include <linux/completion.h>
|
||||||
#include <linux/errno.h>
|
#include <linux/errno.h>
|
||||||
@@ -35,7 +36,7 @@ int32_t nvdla_fw_poweron(struct platform_device *pdev)
|
|||||||
pdata = platform_get_drvdata(pdev);
|
pdata = platform_get_drvdata(pdev);
|
||||||
nvdla_dev = pdata->private_data;
|
nvdla_dev = pdata->private_data;
|
||||||
|
|
||||||
err = nvhost_flcn_finalize_poweron(pdev);
|
err = nvdla_flcn_finalize_poweron(pdev);
|
||||||
if (err) {
|
if (err) {
|
||||||
nvdla_dbg_err(pdev, "failed to poweron\n");
|
nvdla_dbg_err(pdev, "failed to poweron\n");
|
||||||
goto fail;
|
goto fail;
|
||||||
@@ -69,7 +70,7 @@ int32_t nvdla_fw_poweron(struct platform_device *pdev)
|
|||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
poweroff:
|
poweroff:
|
||||||
(void) nvhost_flcn_prepare_poweroff(pdev);
|
(void) nvdla_flcn_prepare_poweroff(pdev);
|
||||||
fail:
|
fail:
|
||||||
return err;
|
return err;
|
||||||
}
|
}
|
||||||
@@ -83,7 +84,7 @@ int32_t nvdla_fw_poweroff(struct platform_device *pdev)
|
|||||||
goto fail;
|
goto fail;
|
||||||
}
|
}
|
||||||
|
|
||||||
err = nvhost_flcn_prepare_poweroff(pdev);
|
err = nvdla_flcn_prepare_poweroff(pdev);
|
||||||
|
|
||||||
fail:
|
fail:
|
||||||
return err;
|
return err;
|
||||||
@@ -94,7 +95,7 @@ int32_t nvdla_fw_init(struct platform_device *pdev)
|
|||||||
struct nvhost_device_data *pdata = platform_get_drvdata(pdev);
|
struct nvhost_device_data *pdata = platform_get_drvdata(pdev);
|
||||||
|
|
||||||
if (pdata->flcn_isr)
|
if (pdata->flcn_isr)
|
||||||
flcn_intr_init(pdev);
|
nvdla_flcn_intr_init(pdev);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
@@ -106,7 +107,7 @@ void nvdla_fw_deinit(struct platform_device *pdev)
|
|||||||
|
|
||||||
int32_t nvdla_fw_reload(struct platform_device *pdev)
|
int32_t nvdla_fw_reload(struct platform_device *pdev)
|
||||||
{
|
{
|
||||||
return flcn_reload_fw(pdev);
|
return nvdla_flcn_reload_fw(pdev);
|
||||||
}
|
}
|
||||||
|
|
||||||
int32_t nvdla_fw_send_cmd(struct platform_device *pdev,
|
int32_t nvdla_fw_send_cmd(struct platform_device *pdev,
|
||||||
|
|||||||
Reference in New Issue
Block a user