From 8942623b15569a25b756fdeba727b82e52abb782 Mon Sep 17 00:00:00 2001 From: Arvind M Date: Tue, 21 Feb 2023 11:23:37 +0000 Subject: [PATCH] gpu: host1x-nvhost: avoid setting flcn irq at boot [1] The DLA firmware configures the DEST and MASK registers during the initialization. [2] In OOT, the DLA KMD is accidentally setting the interrupts. This will result in enabling additional interrupts that the firmware does not handle (like NVDLA_GENERIC_INTR_FAULT_CRITICAL). [3] This commit fixes the issue by avoiding the interrupt settings at the DLA KMD. Bug 3960841 Change-Id: Ied77ac7564ae3b3202b9cceaf08ad3c7da9f947c Signed-off-by: Arvind M Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2861253 Reviewed-by: Mikko Perttunen Reviewed-by: Amit Sharma (SW-TEGRA) Reviewed-by: Jonathan Hunter Reviewed-by: svcacv GVS: Gerrit_Virtual_Submit --- drivers/gpu/host1x-nvhost/falcon.c | 17 +---------------- 1 file changed, 1 insertion(+), 16 deletions(-) diff --git a/drivers/gpu/host1x-nvhost/falcon.c b/drivers/gpu/host1x-nvhost/falcon.c index 9f66549b..53f52550 100644 --- a/drivers/gpu/host1x-nvhost/falcon.c +++ b/drivers/gpu/host1x-nvhost/falcon.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2015-2022, NVIDIA Corporation. All rights reserved. + * Copyright (c) 2015-2023, NVIDIA Corporation. All rights reserved. */ #include @@ -182,21 +182,6 @@ int falcon_boot(struct falcon *falcon) falcon_copy_chunk(falcon, falcon->firmware.code.offset + offset, offset, FALCON_MEMORY_IMEM); - /* setup falcon interrupts */ - falcon_writel(falcon, FALCON_IRQMSET_EXT(0xff) | - FALCON_IRQMSET_SWGEN1 | - FALCON_IRQMSET_SWGEN0 | - FALCON_IRQMSET_EXTERR | - FALCON_IRQMSET_HALT | - FALCON_IRQMSET_WDTMR, - FALCON_IRQMSET); - falcon_writel(falcon, FALCON_IRQDEST_EXT(0xff) | - FALCON_IRQDEST_SWGEN1 | - FALCON_IRQDEST_SWGEN0 | - FALCON_IRQDEST_EXTERR | - FALCON_IRQDEST_HALT, - FALCON_IRQDEST); - /* enable interface */ falcon_writel(falcon, FALCON_ITFEN_MTHDEN | FALCON_ITFEN_CTXEN,