From 8bb21ea4351dbe60aa94a110cd26e9bdfb26424f Mon Sep 17 00:00:00 2001 From: Matti Ryttylainen Date: Mon, 20 May 2024 10:25:54 +0300 Subject: [PATCH] Camera: Add task_fence events for VI/ISP Nsight needs task_fence events from camera engines. Add task_fence event traces to be emitted during ISP task begin/end and during VI frame end. Jira CAMERASW-24223 Change-Id: Ia44baf73777f30abc823459f5e7dfd4d495d3ca6 Signed-off-by: Matti Ryttylainen Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3141174 (cherry picked from commit ad0f0cba98173bbf055f5e69ebf175d9daf1ac3b) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3181495 Reviewed-by: Sampatlal Arjunram Jangid Tested-by: Devang Kubavat GVS: buildbot_gerritrpt Reviewed-by: Laxman Dewangan Reviewed-by: Pushpesh Pranjal Reviewed-by: Semi Malinen --- .../platform/tegra/rtcpu/tegra-rtcpu-trace.c | 37 ++++++++++++- include/trace/events/tegra_rtcpu.h | 55 ++++++++++++++++++- 2 files changed, 89 insertions(+), 3 deletions(-) diff --git a/drivers/platform/tegra/rtcpu/tegra-rtcpu-trace.c b/drivers/platform/tegra/rtcpu/tegra-rtcpu-trace.c index 6392456d..3f27d1cb 100644 --- a/drivers/platform/tegra/rtcpu/tegra-rtcpu-trace.c +++ b/drivers/platform/tegra/rtcpu/tegra-rtcpu-trace.c @@ -1,5 +1,5 @@ // SPDX-License-Identifier: GPL-2.0 -// Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved. +// Copyright (c) 2022-2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved. #include "soc/tegra/camrtc-trace.h" @@ -24,7 +24,7 @@ #include #include #include - +#include #include "device-group.h" #define CREATE_TRACE_POINTS @@ -43,6 +43,9 @@ EXPORT_TRACEPOINT_SYMBOL_GPL(capture_ivc_recv); #define WORK_INTERVAL_DEFAULT 100 #define EXCEPTION_STR_LENGTH 2048 +#define ISP_CLASS_ID 0x32 +#define VI_CLASS_ID 0x30 + /* * Private driver data structure */ @@ -753,6 +756,16 @@ static void rtcpu_trace_vi_frame_event(struct tegra_rtcpu_trace *tracer, event->data.data32[1], pdata->class ); + trace_task_fence( + NVDEV_FENCE_KIND_POST, + VI_CLASS_ID, + event->data.data32[0], + event->data.data32[1], + NVDEV_FENCE_TYPE_SYNCPT, + event->data.data32[0], + event->data.data32[1], + 0, 0, 0, 0, 0 + ); break; default: pr_warn("%pS invalid event id %d\n", @@ -818,6 +831,16 @@ static void rtcpu_trace_isp_task_event(struct tegra_rtcpu_trace *tracer, event->data.data32[1], pdata->class ); + trace_task_fence( + NVDEV_FENCE_KIND_PRE, + ISP_CLASS_ID, + event->data.data32[0], + event->data.data32[1], + NVDEV_FENCE_TYPE_SYNCPT, + event->data.data32[0], + event->data.data32[1], + 0, 0, 0, 0, 0 + ); break; case camrtc_trace_isp_task_end: trace_isp_task_end( @@ -827,6 +850,16 @@ static void rtcpu_trace_isp_task_event(struct tegra_rtcpu_trace *tracer, event->data.data32[1], pdata->class ); + trace_task_fence( + NVDEV_FENCE_KIND_POST, + ISP_CLASS_ID, + event->data.data32[0], + event->data.data32[1], + NVDEV_FENCE_TYPE_SYNCPT, + event->data.data32[0], + event->data.data32[1], + 0, 0, 0, 0, 0 + ); break; default: pr_warn("%pS invalid event id %d\n", diff --git a/include/trace/events/tegra_rtcpu.h b/include/trace/events/tegra_rtcpu.h index c762d38a..f82046ac 100644 --- a/include/trace/events/tegra_rtcpu.h +++ b/include/trace/events/tegra_rtcpu.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved. */ #undef TRACE_SYSTEM @@ -616,6 +616,59 @@ TRACE_EVENT(isp_task_end, __entry->class_id) ); +TRACE_EVENT(task_fence, + TP_PROTO(u32 kind, u32 class_id, u32 task_syncpt_id, u32 task_syncpt_thresh, + u32 type, u32 syncpt_id, u32 syncpt_thresh, u32 sync_fd, u32 semaphore_handle, + u32 semaphore_offset, u32 semaphore_value, u64 semaphore_unique_id), + TP_ARGS(kind, class_id, task_syncpt_id, task_syncpt_thresh, + type, syncpt_id, syncpt_thresh, sync_fd, semaphore_handle, + semaphore_offset, semaphore_value, semaphore_unique_id), + TP_STRUCT__entry( + __field(u32, kind) + __field(u32, class_id) + __field(u32, task_syncpt_id) + __field(u32, task_syncpt_thresh) + __field(u32, type) + __field(u32, syncpt_id) + __field(u32, syncpt_thresh) + __field(u32, sync_fd) + __field(u32, semaphore_handle) + __field(u32, semaphore_offset) + __field(u32, semaphore_value) + __field(u64, semaphore_unique_id) + ), + TP_fast_assign( + __entry->kind = kind; + __entry->class_id = class_id; + __entry->task_syncpt_id = task_syncpt_id; + __entry->task_syncpt_thresh = task_syncpt_thresh; + __entry->type = type; + __entry->syncpt_id = syncpt_id; + __entry->syncpt_thresh = syncpt_thresh; + __entry->sync_fd = sync_fd; + __entry->semaphore_handle = semaphore_handle; + __entry->semaphore_offset = semaphore_offset; + __entry->semaphore_value = semaphore_value; + __entry->semaphore_unique_id = semaphore_unique_id; + ), + TP_printk( + "kind:0x%x class_id:0x%x task_syncpt_id:%u task_syncpt_thresh:%u type:%u " + "syncpt_id:%u syncpt_thresh:%u sync_fd:%u semaphore_handle:%u " + "semaphore_offset:%u semaphore_value:%u semaphore_unique_id:%llu", + __entry->kind, + __entry->class_id, + __entry->task_syncpt_id, + __entry->task_syncpt_thresh, + __entry->type, + __entry->syncpt_id, + __entry->syncpt_thresh, + __entry->sync_fd, + __entry->semaphore_handle, + __entry->semaphore_offset, + __entry->semaphore_value, + __entry->semaphore_unique_id) +); + #endif /* _TRACE_TEGRA_RTCPU_H */