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linux: kmd: static analysis TOP25 S03/05 Part 4
Under the following path: - drivers/media/platform/tegra/camera/camera_common.c - drivers/media/platform/tegra/camera/fusa-capture/capture-isp.c - drivers/media/platform/tegra/camera/fusa-capture/capture-vi.c - drivers/media/platform/tegra/camera/sensor_common.c - drivers/media/platform/tegra/camera/tegracam_core.c - drivers/media/platform/tegra/camera/tegracam_utils.c - drivers/media/platform/tegra/camera/vi/graph.c Jira CAMERASW-32528 Change-Id: I8f3bb839dfe6e61928642f0ca32bcaf972d6c84a Signed-off-by: Junsheng Chen <junshengc@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3314084 Reviewed-by: Shan Neng Chen <snchen@nvidia.com> Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com> Reviewed-by: svcacv <svcacv@nvidia.com> Reviewed-by: Ankur Pawar <ankurp@nvidia.com> GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com> Reviewed-by: Zhiyuan Wang <zhiwang@nvidia.com>
This commit is contained in:
committed by
Jon Hunter
parent
46c2c0bca3
commit
90b244eb03
@@ -259,8 +259,12 @@ int camera_common_parse_clocks(struct device *dev,
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/* find length of clock-names string array */
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for (i = 0; i < proplen; i++) {
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if (prop[i] == '\0')
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numclocks++;
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if (prop[i] == '\0') {
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if (check_add_overflow(numclocks, 1, &numclocks)) {
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dev_err(dev, "%s: numclocks overflow\n", __func__);
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return -EINVAL;
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}
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}
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}
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if (numclocks > 1) {
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@@ -2496,7 +2496,8 @@ static int capture_isp_probe(struct platform_device *pdev)
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}
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}
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for (i = 0; ; i++) {
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i = 0U;
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do {
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struct device_node *node;
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struct platform_device *ispdev;
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@@ -2521,7 +2522,7 @@ static int capture_isp_probe(struct platform_device *pdev)
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info->isp_pdevices[i] = ispdev;
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info->num_isp_devices++;
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}
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} while (!check_add_overflow(i, 1U, &i));
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if (info->num_isp_devices < 1)
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return -EINVAL;
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@@ -1787,7 +1787,8 @@ static int capture_vi_probe(struct platform_device *pdev)
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if (info->max_vi_channels == 0)
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info->max_vi_channels = DEFAULT_VI_CHANNELS;
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for (ii = 0; ; ii++) {
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ii = 0U;
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do {
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struct device_node *np;
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struct platform_device *pvidev;
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@@ -1812,7 +1813,7 @@ static int capture_vi_probe(struct platform_device *pdev)
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info->vi_pdevices[ii] = pvidev;
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info->num_vi_devices++;
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}
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} while (!check_add_overflow(ii, 1U, &ii));
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if (info->num_vi_devices < 1)
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return -EINVAL;
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@@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* SPDX-FileCopyrightText: Copyright (c) 2017-2024 NVIDIA CORPORATION & AFFILIATES.
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* SPDX-FileCopyrightText: Copyright (c) 2017-2025 NVIDIA CORPORATION & AFFILIATES.
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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@@ -65,6 +65,8 @@ static int sensor_common_parse_signal_props(
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u64 val64 = 0;
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u64 rate;
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int depth;
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u64 lane_rate;
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u64 symbol_rate;
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err = of_property_read_string(node, "phy_mode", &temp_str);
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if (err) {
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@@ -137,14 +139,22 @@ static int sensor_common_parse_signal_props(
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}
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/* Convert pixel rate to lane data rate */
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rate = rate * depth / signal->num_lanes;
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if (check_mul_overflow(rate, (u64)depth, &lane_rate)) {
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dev_err(dev, "%s: convert pixel rate to lane data rate overflow\n", __func__);
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return -EINVAL;
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}
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rate = lane_rate / signal->num_lanes;
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if (signal->phy_mode == CSI_PHY_MODE_DPHY) {
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/* MIPI clock rate */
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signal->mipi_clock.val = rate / 2;
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} else if (signal->phy_mode == CSI_PHY_MODE_CPHY) {
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/* Symbol rate */
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signal->mipi_clock.val = rate * 7 / 16;
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if (check_mul_overflow(rate, 7ULL, &symbol_rate)) {
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dev_err(dev, "%s: symbol rate overflow\n", __func__);
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return -EINVAL;
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}
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signal->mipi_clock.val = symbol_rate / 16;
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} else {
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/* Data rate */
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signal->mipi_clock.val = rate;
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@@ -1,8 +1,10 @@
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// SPDX-License-Identifier: GPL-2.0
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* SPDX-FileCopyrightText: Copyright (c) 2017-2025 NVIDIA CORPORATION & AFFILIATES.
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* All rights reserved.
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*
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* tegracam_core - tegra camera framework initialization
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*
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* Copyright (c) 2017-2022, NVIDIA CORPORATION. All rights reserved.
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*/
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#include <linux/list.h>
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#include <linux/mutex.h>
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@@ -153,7 +155,11 @@ int tegracam_device_register(struct tegracam_device *tc_dev)
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s_data->frmfmt[mode_idx].size.width;
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s_data->def_height = s_data->fmt_height =
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s_data->frmfmt[mode_idx].size.height;
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s_data->def_clk_freq = signal_props->mclk_freq * 1000;
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if (check_mul_overflow(signal_props->mclk_freq, 1000U, (u32 *)(&(s_data->def_clk_freq)))) {
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dev_err(dev, "%s: mclk freq overflow\n", __func__);
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return -EINVAL;
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}
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/* add version info to identify the right feature set */
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tc_dev->version = tegracam_version(TEGRACAM_MAJOR_VERSION,
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@@ -214,7 +214,10 @@ int write_sensor_blob(struct regmap *regmap, struct sensor_blob *blob)
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&blob->buf[buf_index], size);
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if (err)
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return err;
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buf_index += size;
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if (check_add_overflow(buf_index, size, &buf_index)) {
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pr_err("buffer index overflow\n");
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return -EINVAL;
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}
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} else {
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pr_err("blob has been packaged with errors\n");
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return -EINVAL;
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@@ -1,8 +1,8 @@
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// SPDX-License-Identifier: GPL-2.0
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// SPDX-License-Identifier: GPL-2.0-only
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// SPDX-FileCopyrightText: Copyright (c) 2018-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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/*
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* NVIDIA Media controller graph management
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*
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* Copyright (c) 2015-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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*/
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#include <nvidia/conftest.h>
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@@ -651,7 +651,10 @@ int tegra_vi_graph_init(struct tegra_mc_vi *vi)
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entity->asd.match.fwnode = of_fwnode_handle(remote);
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#endif
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list_add_tail(&entity->list, &chan->entities);
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chan->num_subdevs++;
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if (check_add_overflow(chan->num_subdevs, 1U, &chan->num_subdevs)) {
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dev_err(vi->dev, "%s: num subdevs overflow\n", __func__);
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break;
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}
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chan->notifier.ops = chan->notifier.ops ? chan->notifier.ops : &vi_chan_notify_ops;
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/* Parse and add entities on this enpoint/channel */
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