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vse: add support for SM4 GMAC

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Jira ESSS-1417

Change-Id: Ica5cdb08f04e75fba50badb9bd3342f2cd2004b9
Signed-off-by: Nagaraj P N <nagarajp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3172038
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Nagaraj P N
2024-07-10 04:40:18 +00:00
committed by mobile promotions
parent afb2145beb
commit 97434deea4
4 changed files with 17 additions and 3 deletions
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12
drivers/crypto/tegra-hv-vse-safety.c
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@@ -311,6 +311,7 @@
#define NVVSE_STATUS_SE_SERVER_ERROR 102U #define NVVSE_STATUS_SE_SERVER_ERROR 102U
#define SE_HW_VALUE_MATCH_CODE 0x5A5A5A5A #define SE_HW_VALUE_MATCH_CODE 0x5A5A5A5A
#define SE_HW_VALUE_MISMATCH_CODE 0xBDBDBDBD #define SE_HW_VALUE_MISMATCH_CODE 0xBDBDBDBD
static struct crypto_dev_to_ivc_map g_crypto_to_ivc_map[MAX_NUMBER_MISC_DEVICES]; static struct crypto_dev_to_ivc_map g_crypto_to_ivc_map[MAX_NUMBER_MISC_DEVICES];
static bool gcm_supports_dma; static bool gcm_supports_dma;
@@ -473,6 +474,7 @@ union tegra_virtual_se_aes_args {
uint32_t config; uint32_t config;
u8 expected_tag[TEGRA_VIRTUAL_SE_AES_BLOCK_SIZE]; u8 expected_tag[TEGRA_VIRTUAL_SE_AES_BLOCK_SIZE];
uint64_t gcm_vrfy_res_addr; uint64_t gcm_vrfy_res_addr;
enum vse_sym_cipher_choice sym_ciph;
} op_gcm; } op_gcm;
struct aes_cmac_sv { struct aes_cmac_sv {
u8 keyslot[KEYSLOT_SIZE_BYTES]; u8 keyslot[KEYSLOT_SIZE_BYTES];
@@ -490,7 +492,7 @@ union tegra_virtual_se_aes_args {
struct aes_rng { struct aes_rng {
struct tegra_virtual_se_addr dst_addr; struct tegra_virtual_se_addr dst_addr;
} op_rng; } op_rng;
} __attribute__((__packed__)); };
union tegra_virtual_se_sha_args { union tegra_virtual_se_sha_args {
struct hash { struct hash {
@@ -4902,6 +4904,11 @@ static int tegra_hv_vse_aes_gmac_sv_op_hw_support(struct ahash_request *req, boo
} }
} }
if (gmac_ctx->b_is_sm4 == 1U)
ivc_tx->aes.op_gcm.sym_ciph = VSE_SYM_CIPH_SM4;
else
ivc_tx->aes.op_gcm.sym_ciph = VSE_SYM_CIPH_AES;
g_crypto_to_ivc_map[gmac_ctx->node_id].vse_thread_start = true; g_crypto_to_ivc_map[gmac_ctx->node_id].vse_thread_start = true;
init_completion(&priv->alg_complete); init_completion(&priv->alg_complete);
@@ -4918,10 +4925,9 @@ static int tegra_hv_vse_aes_gmac_sv_op_hw_support(struct ahash_request *req, boo
err = status_to_errno(priv->rx_status); err = status_to_errno(priv->rx_status);
goto free_exit; goto free_exit;
} else { } else {
if (is_last && gmac_req_data->request_type == GMAC_SIGN) { if (is_last && gmac_req_data->request_type == GMAC_SIGN)
/* copy tag to req for last GMAC_SIGN requests */ /* copy tag to req for last GMAC_SIGN requests */
memcpy(req->result, tag_buf, gmac_ctx->authsize); memcpy(req->result, tag_buf, gmac_ctx->authsize);
}
} }
if (is_last && gmac_req_data->request_type == GMAC_VERIFY) { if (is_last && gmac_req_data->request_type == GMAC_VERIFY) {

2
drivers/crypto/tegra-hv-vse.h
View File

@@ -134,6 +134,8 @@ struct tegra_virtual_se_aes_gmac_context {
bool is_key_slot_allocated; bool is_key_slot_allocated;
/*Crypto dev instance*/ /*Crypto dev instance*/
uint32_t node_id; uint32_t node_id;
/* Flag to indicate if sm4 is enabled*/
uint8_t b_is_sm4;
}; };
/* Security Engine SHA context */ /* Security Engine SHA context */

1
drivers/crypto/tegra-nvvse-cryptodev.c
View File

@@ -1053,6 +1053,7 @@ static int tnvvse_crypto_aes_gmac_sign_verify_init(struct tnvvse_crypto_ctx *ctx
gmac_ctx = crypto_ahash_ctx(tfm); gmac_ctx = crypto_ahash_ctx(tfm);
gmac_ctx->node_id = ctx->node_id; gmac_ctx->node_id = ctx->node_id;
gmac_ctx->b_is_sm4 = gmac_sign_verify_ctl->b_is_sm4;
driver_name = crypto_tfm_alg_driver_name(crypto_ahash_tfm(tfm)); driver_name = crypto_tfm_alg_driver_name(crypto_ahash_tfm(tfm));
if (driver_name == NULL) { if (driver_name == NULL) {

5
include/uapi/misc/tegra-nvvse-cryptodev.h
View File

@@ -366,6 +366,11 @@ struct tegra_nvvse_aes_gmac_sign_verify_ctl {
* - Non-zero value indicates GMAC verification failure. * - Non-zero value indicates GMAC verification failure.
*/ */
uint8_t result; uint8_t result;
/** [in] Flag to indicate SM4 request.
* 0 indicates non-SM4 request
* non-zero indicates SM4 request
*/
uint8_t b_is_sm4;
}; };
#define NVVSE_IOCTL_CMDID_AES_GMAC_SIGN_VERIFY _IOWR(TEGRA_NVVSE_IOC_MAGIC, \ #define NVVSE_IOCTL_CMDID_AES_GMAC_SIGN_VERIFY _IOWR(TEGRA_NVVSE_IOC_MAGIC, \
TEGRA_NVVSE_CMDID_AES_GMAC_SIGN_VERIFY, \ TEGRA_NVVSE_CMDID_AES_GMAC_SIGN_VERIFY, \