nvethernet: Add workqueue to set Rx mode.

Issue:
Network RTNL lock disables scheduler which causes IVC hang.

Fix:
- Add workqueue to set Rx mode.
- Change IVC spinlock to workqueue.
- Add virtualization check for macsec clk init.
- Add Read & Write Register.

Bug 2694285

Change-Id: I8354b500c62c0145eeed9a66bfcc8227fc8999e7
Signed-off-by: Nagaraj annaiah <nannaiah@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2520309
This commit is contained in:
nannaiah
2021-04-25 21:47:54 -07:00
committed by Revanth Kumar Uppala
parent c804eef959
commit 975e946c85
7 changed files with 88 additions and 35 deletions

View File

@@ -142,28 +142,30 @@ static int macsec_enable_car(struct macsec_priv_data *macsec_pdata)
}
}
} else {
/* For Pre-sil only, reset the MACsec controller directly.
* clk ungate first, followed by disabling reset
* Bit 8 in CLK_RST_CONTROLLER_RST_DEV_MGBE_0 register.
*/
addr = devm_ioremap(dev, 0x21460080, 0x4);
if (addr) {
val = readl(addr);
val |= BIT(2);
writel(val, addr);
devm_iounmap(dev, addr);
}
if (pdata->osi_core->use_virtualization != OSI_ENABLE) {
/* For Pre-sil only, reset the MACsec controller directly.
* clk ungate first, followed by disabling reset
* Bit 8 in CLK_RST_CONTROLLER_RST_DEV_MGBE_0 register.
*/
addr = devm_ioremap(dev, 0x21460080, 0x4);
if (addr) {
val = readl(addr);
val |= BIT(2);
writel(val, addr);
devm_iounmap(dev, addr);
}
/* Followed by disabling reset - Bit 8 in
* CLK_RST_CONTROLLER_RST_DEV_MGBE_0 register.
*/
addr = devm_ioremap(dev, 0x21460018, 0x4);
if (addr) {
val = readl(addr);
val &= ~BIT(8);
writel(val, addr);
devm_iounmap(dev, addr);
}
/* Followed by disabling reset - Bit 8 in
* CLK_RST_CONTROLLER_RST_DEV_MGBE_0 register.
*/
addr = devm_ioremap(dev, 0x21460018, 0x4);
if (addr) {
val = readl(addr);
val &= ~BIT(8);
writel(val, addr);
devm_iounmap(dev, addr);
}
}
}
goto exit;