ASoC: tegra-alt: remove dev.id parsing from DT

For AHUB modules instance number is passed with a DT property. For example,
"nvidia,ahub-i2s-id" property is used in I2S nodes. Similarly other modules
use "nvidia,ahub-<module>-id" property, where <module> is "dmic" or "dspk"
or other corresponding module names. With DAI links in DT now, this is not
required any more. Hence the parsing code for such properties is removed.

Bug 200503387

Change-Id: Ia372044ebecfe090668953b8da81028c63812a4f
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2146859
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sameer Pujar
2019-06-30 08:45:26 +05:30
parent 14ccf06582
commit 9c3c3fbc35
14 changed files with 3 additions and 112 deletions

View File

@@ -772,13 +772,6 @@ static int tegra186_arad_platform_probe(struct platform_device *pdev)
} }
regcache_cache_only(arad->regmap, true); regcache_cache_only(arad->regmap, true);
ret = of_property_read_u32(pdev->dev.of_node, "nvidia,ahub-arad-id",
&pdev->dev.id);
if (ret < 0) {
dev_err(&pdev->dev, "Missing property nvidia,ahub-arad-id\n");
return ret;
}
pm_runtime_enable(&pdev->dev); pm_runtime_enable(&pdev->dev);
ret = snd_soc_register_codec(&pdev->dev, &tegra186_arad_codec, ret = snd_soc_register_codec(&pdev->dev, &tegra186_arad_codec,

View File

@@ -1114,13 +1114,6 @@ static int tegra186_asrc_platform_probe(struct platform_device *pdev)
} }
regcache_cache_only(asrc->regmap, true); regcache_cache_only(asrc->regmap, true);
ret = of_property_read_u32(pdev->dev.of_node, "nvidia,ahub-asrc-id",
&pdev->dev.id);
if (ret < 0) {
dev_err(&pdev->dev, "Missing property nvidia,ahub-asrc-id\n");
return ret;
}
#ifdef CONFIG_TEGRA186_AHC #ifdef CONFIG_TEGRA186_AHC
tegra186_ahc_register_cb(tegra186_asrc_ahc_cb, TEGRA186_AHC_ASRC1_CB, tegra186_ahc_register_cb(tegra186_asrc_ahc_cb, TEGRA186_AHC_ASRC1_CB,
&pdev->dev); &pdev->dev);

View File

@@ -463,13 +463,6 @@ static int tegra186_dspk_platform_probe(struct platform_device *pdev)
} }
regcache_cache_only(dspk->regmap, true); regcache_cache_only(dspk->regmap, true);
ret = of_property_read_u32(np, "nvidia,ahub-dspk-id",
&pdev->dev.id);
if (ret < 0) {
dev_err(&pdev->dev, "Missing property nvidia,ahub-dspk-id\n");
return ret;
}
pm_runtime_enable(&pdev->dev); pm_runtime_enable(&pdev->dev);
ret = snd_soc_register_codec(&pdev->dev, &tegra186_dspk_codec, ret = snd_soc_register_codec(&pdev->dev, &tegra186_dspk_codec,
tegra186_dspk_dais, tegra186_dspk_dais,

View File

@@ -820,14 +820,6 @@ static int tegra210_adx_platform_probe(struct platform_device *pdev)
} }
regcache_cache_only(adx->regmap, true); regcache_cache_only(adx->regmap, true);
ret = of_property_read_u32(pdev->dev.of_node,
"nvidia,ahub-adx-id",
&pdev->dev.id);
if (ret < 0) {
dev_err(&pdev->dev, "Missing property nvidia,ahub-adx-id\n");
return ret;
}
pm_runtime_enable(&pdev->dev); pm_runtime_enable(&pdev->dev);
ret = snd_soc_register_codec(&pdev->dev, &tegra210_adx_codec, ret = snd_soc_register_codec(&pdev->dev, &tegra210_adx_codec,
tegra210_adx_dais, tegra210_adx_dais,

View File

@@ -541,14 +541,6 @@ static int tegra210_afc_platform_probe(struct platform_device *pdev)
} }
regcache_cache_only(afc->regmap, true); regcache_cache_only(afc->regmap, true);
ret = of_property_read_u32(pdev->dev.of_node,
"nvidia,ahub-afc-id",
&pdev->dev.id);
if (ret < 0) {
dev_err(&pdev->dev, "Missing property nvidia,ahub-afc-id\n");
return -ret;
}
/* Disable SLGC */ /* Disable SLGC */
regmap_write(afc->regmap, TEGRA210_AFC_CG, 0); regmap_write(afc->regmap, TEGRA210_AFC_CG, 0);

View File

@@ -904,14 +904,6 @@ static int tegra210_amx_platform_probe(struct platform_device *pdev)
} }
regcache_cache_only(amx->regmap, true); regcache_cache_only(amx->regmap, true);
ret = of_property_read_u32(pdev->dev.of_node,
"nvidia,ahub-amx-id",
&pdev->dev.id);
if (ret < 0) {
dev_err(&pdev->dev, "Missing property nvidia,ahub-amx-id\n");
return ret;
}
pm_runtime_enable(&pdev->dev); pm_runtime_enable(&pdev->dev);
ret = snd_soc_register_codec(&pdev->dev, &tegra210_amx_codec, ret = snd_soc_register_codec(&pdev->dev, &tegra210_amx_codec,
tegra210_amx_dais, tegra210_amx_dais,

View File

@@ -582,13 +582,6 @@ static int tegra210_dmic_platform_probe(struct platform_device *pdev)
regmap_write(dmic->regmap, TEGRA210_DMIC_DCR_BIQUAD_0_COEF_4, regmap_write(dmic->regmap, TEGRA210_DMIC_DCR_BIQUAD_0_COEF_4,
0x00000000); 0x00000000);
ret = of_property_read_u32(np, "nvidia,ahub-dmic-id",
&pdev->dev.id);
if (ret < 0) {
dev_err(&pdev->dev, "Missing property nvidia,ahub-dmic-id\n");
return ret;
}
pm_runtime_enable(&pdev->dev); pm_runtime_enable(&pdev->dev);
ret = snd_soc_register_codec(&pdev->dev, &tegra210_dmic_codec, ret = snd_soc_register_codec(&pdev->dev, &tegra210_dmic_codec,
tegra210_dmic_dais, tegra210_dmic_dais,

View File

@@ -1095,30 +1095,20 @@ static int tegra210_i2s_platform_probe(struct platform_device *pdev)
} }
regcache_cache_only(i2s->regmap, true); regcache_cache_only(i2s->regmap, true);
ret = of_property_read_u32(np, "nvidia,ahub-i2s-id",
&pdev->dev.id);
if (ret < 0) {
dev_err(&pdev->dev, "Missing property nvidia,ahub-i2s-id\n");
return ret;
}
if (of_property_read_u32(pdev->dev.of_node, "bclk-ratio", if (of_property_read_u32(pdev->dev.of_node, "bclk-ratio",
&i2s->bclk_ratio) < 0) { &i2s->bclk_ratio) < 0) {
dev_dbg(&pdev->dev, "Missing prop bclk-ratio for I2S%d\n", dev_dbg(&pdev->dev, "Missing prop bclk-ratio for I2S\n");
pdev->dev.id);
i2s->bclk_ratio = 1; i2s->bclk_ratio = 1;
} }
if (of_property_read_u32(pdev->dev.of_node, if (of_property_read_u32(pdev->dev.of_node,
"fsync-width", &i2s->fsync_width) < 0) { "fsync-width", &i2s->fsync_width) < 0) {
dev_info(&pdev->dev, "Missing prop fsync-width for I2S%d\n", dev_info(&pdev->dev, "Missing prop fsync-width for I2S\n");
pdev->dev.id);
i2s->fsync_width = 31; i2s->fsync_width = 31;
} }
if (i2s->fsync_width > 255) { if (i2s->fsync_width > 255) {
dev_warn(&pdev->dev, "Default fsync-width to 31 for I2S%d\n", dev_warn(&pdev->dev, "Default fsync-width to 31 for I2S\n");
pdev->dev.id);
i2s->fsync_width = 31; i2s->fsync_width = 31;
} }

View File

@@ -326,14 +326,6 @@ static int tegra210_iqc_platform_probe(struct platform_device *pdev)
} }
regcache_cache_only(iqc->regmap, true); regcache_cache_only(iqc->regmap, true);
ret = of_property_read_u32(pdev->dev.of_node,
"nvidia,ahub-iqc-id",
&pdev->dev.id);
if (ret < 0) {
dev_err(&pdev->dev, "Missing property nvidia,ahub-iqc-id\n");
return ret;
}
if (of_property_read_u32(pdev->dev.of_node, if (of_property_read_u32(pdev->dev.of_node,
"timestamp-enable", "timestamp-enable",
&iqc->timestamp_enable) < 0) { &iqc->timestamp_enable) < 0) {

View File

@@ -723,14 +723,6 @@ static int tegra210_mixer_platform_probe(struct platform_device *pdev)
} }
regcache_cache_only(mixer->regmap, true); regcache_cache_only(mixer->regmap, true);
ret = of_property_read_u32(pdev->dev.of_node,
"nvidia,ahub-amixer-id",
&pdev->dev.id);
if (ret < 0) {
dev_err(&pdev->dev, "Missing property nvidia,ahub-amixer-id\n");
return ret;
}
pm_runtime_enable(&pdev->dev); pm_runtime_enable(&pdev->dev);
ret = snd_soc_register_codec(&pdev->dev, &tegra210_mixer_codec, ret = snd_soc_register_codec(&pdev->dev, &tegra210_mixer_codec,
tegra210_mixer_dais, tegra210_mixer_dais,

View File

@@ -647,14 +647,6 @@ static int tegra210_mvc_platform_probe(struct platform_device *pdev)
} }
regcache_cache_only(mvc->regmap, true); regcache_cache_only(mvc->regmap, true);
ret = of_property_read_u32(pdev->dev.of_node,
"nvidia,ahub-mvc-id",
&pdev->dev.id);
if (ret < 0) {
dev_err(&pdev->dev, "Missing property nvidia,ahub-mvc-id\n");
return ret;
}
pm_runtime_enable(&pdev->dev); pm_runtime_enable(&pdev->dev);
ret = snd_soc_register_codec(&pdev->dev, &tegra210_mvc_codec, ret = snd_soc_register_codec(&pdev->dev, &tegra210_mvc_codec,
tegra210_mvc_dais, tegra210_mvc_dais,

View File

@@ -355,14 +355,6 @@ static int tegra210_ope_platform_probe(struct platform_device *pdev)
} }
regcache_cache_only(ope->mbdrc_regmap, true); regcache_cache_only(ope->mbdrc_regmap, true);
ret = of_property_read_u32(pdev->dev.of_node,
"nvidia,ahub-ope-id",
&pdev->dev.id);
if (ret < 0) {
dev_err(&pdev->dev, "Missing property nvidia,ahub-ope-id\n");
return ret;
}
pm_runtime_enable(&pdev->dev); pm_runtime_enable(&pdev->dev);
ret = snd_soc_register_codec(&pdev->dev, &tegra210_ope_codec, ret = snd_soc_register_codec(&pdev->dev, &tegra210_ope_codec,
tegra210_ope_dais, tegra210_ope_dais,

View File

@@ -3553,14 +3553,6 @@ static int tegra210_sfc_platform_probe(struct platform_device *pdev)
} }
regcache_cache_only(sfc->regmap, true); regcache_cache_only(sfc->regmap, true);
ret = of_property_read_u32(pdev->dev.of_node,
"nvidia,ahub-sfc-id",
&pdev->dev.id);
if (ret < 0) {
dev_err(&pdev->dev, "Missing property nvidia,ahub-sfc-id\n");
return ret;
}
pm_runtime_enable(&pdev->dev); pm_runtime_enable(&pdev->dev);
ret = snd_soc_register_codec(&pdev->dev, &tegra210_sfc_codec, ret = snd_soc_register_codec(&pdev->dev, &tegra210_sfc_codec,
tegra210_sfc_dais, tegra210_sfc_dais,

View File

@@ -427,13 +427,6 @@ static int tegra210_spdif_platform_probe(struct platform_device *pdev)
} }
regcache_cache_only(spdif->regmap, true); regcache_cache_only(spdif->regmap, true);
ret = of_property_read_u32(np, "nvidia,ahub-spdif-id",
&pdev->dev.id);
if (ret < 0) {
dev_err(&pdev->dev, "Missing property nvidia,ahub-spdif-id\n");
return ret;
}
pm_runtime_enable(&pdev->dev); pm_runtime_enable(&pdev->dev);
ret = snd_soc_register_codec(&pdev->dev, &tegra210_spdif_codec, ret = snd_soc_register_codec(&pdev->dev, &tegra210_spdif_codec,
tegra210_spdif_dais, tegra210_spdif_dais,