From 9e4c08a7c2b1e684733dece93d6dc714d6c4fe94 Mon Sep 17 00:00:00 2001 From: sheetal Date: Fri, 28 May 2021 18:29:50 +0530 Subject: [PATCH] ASoC: tegra: Update PLLA base rate for x8KHz This change is decided as per Bug (Bug 200702569) and it will keep the range for all channels within 35MHz. Adding same change to make automation script to work. Bug 200683609 Change-Id: Ibba3847133d643c0132e8660a8ae21c7383a8afd Signed-off-by: sheetal Reviewed-on: https://git-master.nvidia.com/r/c/linux-5.10/+/2536432 Reviewed-by: svcacv Reviewed-by: Viswanath L Reviewed-by: Mohan Kumar D Reviewed-by: Sameer Pujar Reviewed-by: svc_kernel_abi Reviewed-by: Asha Talambedu Reviewed-by: Sharad Gupta Reviewed-by: mobile promotions GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions --- sound/soc/tegra/tegra_asoc_utils.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/tegra/tegra_asoc_utils.c b/sound/soc/tegra/tegra_asoc_utils.c index b024033f..dab059cf 100644 --- a/sound/soc/tegra/tegra_asoc_utils.c +++ b/sound/soc/tegra/tegra_asoc_utils.c @@ -26,7 +26,7 @@ enum rate_type { NUM_RATE_TYPE, }; unsigned int tegra210_pll_base_rate[NUM_RATE_TYPE] = {338688000, 368640000}; -unsigned int tegra186_pll_base_rate[NUM_RATE_TYPE] = {270950400, 245760000}; +unsigned int tegra186_pll_base_rate[NUM_RATE_TYPE] = {270950400, 294912000}; unsigned int default_pll_out_rate[NUM_RATE_TYPE] = {45158400, 49152000}; int tegra_asoc_utils_set_rate(struct tegra_asoc_utils_data *data, int srate,