From a2bb0f689840c738c556ce39d09a6d81ae14bc22 Mon Sep 17 00:00:00 2001
From: Laxman Dewangan <ldewangan@nvidia.com>
Date: Mon, 25 Apr 2022 06:12:46 +0000
Subject: [PATCH] documentation: Add DT binding document for nvidia-vrs-pseq

Add Device Tree binding document for the NVIDIA VRS power sequencer
device.

Bug 3583627

Change-Id: I708ec9377543228d60a91defe57a8c88b2fc7b0a
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2702276
GVS: Gerrit_Virtual_Submit
---
 .../bindings/mfd/nvidia-vrs-pseq.yaml         | 67 +++++++++++++++++++
 1 file changed, 67 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/nvidia-vrs-pseq.yaml

diff --git a/Documentation/devicetree/bindings/mfd/nvidia-vrs-pseq.yaml b/Documentation/devicetree/bindings/mfd/nvidia-vrs-pseq.yaml
new file mode 100644
index 00000000..d1bda112
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/nvidia-vrs-pseq.yaml
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/nvidia-vrs-seq.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NVIDIA VRS sequencer driver
+
+maintainers:
+  - Shubhi Garg <shgarg@nvidia.com>
+  - Laxman Dewangan <ldewangan@nvidia.com>
+
+description: |
+  NVIDIA VRS sequencer device for controlling the voltage rails.
+
+properties:
+  compatible:
+    const: "nvidia,vrs-pseq"
+
+  reg:
+    description:
+      I2C device address.
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  interrupt-controller: true
+
+  "#interrupt-cells":
+    const: 2
+    description:
+      The first cell is the IRQ number, the second cell is the trigger type.
+
+  rtc:
+    $ref: ../rtc/nvidia-vrs-rtc.yaml
+
+
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - interrupt-controller
+  - "#interrupt-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    bpmp {
+        i2c {
+            vrs@3c {
+                compatible = "nvidia,vrs-pseq";
+                reg = <0x3c>;
+                interrupt-parent = <&intc>;
+                /* IRQ is active-low but pmc inverts the signal */
+                interrupts = <GIC_SPI TEGRA234_IRQ_PMIC_EXT_INTR IRQ_TYPE_LEVEL_HIGH>;
+                interrupt-controller;
+                #interrupt-cells = <3>;
+
+                vrs_rtc: rtc {
+                        status = "okay";
+                };
+            };
+        };
+    };