diff --git a/sound/soc/tegra-alt/include/tegra_asoc_utils_alt.h b/sound/soc/tegra-alt/include/tegra_asoc_utils_alt.h
index c5ddc754..789767b2 100644
--- a/sound/soc/tegra-alt/include/tegra_asoc_utils_alt.h
+++ b/sound/soc/tegra-alt/include/tegra_asoc_utils_alt.h
@@ -62,8 +62,6 @@ struct tegra_asoc_audio_clock_info {
 	u32 set_pll_out_rate;
 	u32 set_aud_mclk_rate;
 	u32 mclk_scale;
-	/* fixed MCLK rate from DT */
-	u32 mclk_rate;
 
 	/* FIXME: below would be removed going ahead */
 	u32 clk_rates[MAX_NUM_RATES];
diff --git a/sound/soc/tegra-alt/machine_drivers/tegra_machine_driver_mobile.c b/sound/soc/tegra-alt/machine_drivers/tegra_machine_driver_mobile.c
index 1641dcbf..04a0a92a 100644
--- a/sound/soc/tegra-alt/machine_drivers/tegra_machine_driver_mobile.c
+++ b/sound/soc/tegra-alt/machine_drivers/tegra_machine_driver_mobile.c
@@ -793,16 +793,9 @@ static int tegra_machine_driver_probe(struct platform_device *pdev)
 		return ret;
 
 	memset(&machine->audio_clock, 0, sizeof(machine->audio_clock));
-	if (of_property_read_u32(np, "nvidia,mclk-rate",
-				 &machine->audio_clock.mclk_rate) < 0)
-		dev_dbg(&pdev->dev, "Missing property nvidia,mclk-rate\n");
-
 	if (of_property_read_u32(np, "mclk-fs",
-				 &machine->audio_clock.mclk_scale) < 0) {
-		/* TODO: fix clock in DT and remove usage of default scale */
-		machine->audio_clock.mclk_scale = 256;
+				 &machine->audio_clock.mclk_scale) < 0)
 		dev_dbg(&pdev->dev, "Missing property mclk-fs\n");
-	}
 
 	ret = add_dai_links(pdev);
 	if (ret < 0)
diff --git a/sound/soc/tegra-alt/utils/tegra_asoc_utils_alt.c b/sound/soc/tegra-alt/utils/tegra_asoc_utils_alt.c
index 0aa72a05..25c68cd0 100644
--- a/sound/soc/tegra-alt/utils/tegra_asoc_utils_alt.c
+++ b/sound/soc/tegra-alt/utils/tegra_asoc_utils_alt.c
@@ -87,11 +87,6 @@ int tegra_alt_asoc_utils_set_rate(struct tegra_asoc_audio_clock_info *data,
 		pll_out = pll_out >> 1;
 	if (data->mclk_scale)
 		aud_mclk = srate * data->mclk_scale;
-	/*
-	 * mclk_rate is the fixed clock from DT, this overrides mclk_scale.
-	 * TODO: manage MCLK fixed or dynamic rate from a single DT property.
-	 */
-	aud_mclk = data->mclk_rate ? data->mclk_rate : aud_mclk;
 
 	if (data->set_pll_base_rate != new_pll_base) {
 		err = clk_set_rate(data->clk_pll_base, new_pll_base);