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drm/tegra: Fix setting of blocklinear bit in relocations

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The code to set the blocklinear swizzling bit 39 was completely broken.
Fix it.

Change-Id: I311714931f9b4e96f1cff1940aacdeb6a158bfe5
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2505463
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Mikko Perttunen
2021-03-25 14:36:15 +02:00
committed by Laxman Dewangan
parent e901dffc48
commit a4cfbdfb2c
1 changed files with 4 additions and 2 deletions
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6
drivers/gpu/drm/tegra/uapi/submit.c
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@@ -111,13 +111,15 @@ static int submit_write_reloc(struct gather_bo *bo,
{
/* TODO check that target_offset is within bounds */
dma_addr_t iova = mapping->iova + buf->reloc.target_offset;
u32 written_ptr = (u32)(iova >> buf->reloc.shift);
u32 written_ptr;
#ifdef CONFIG_ARM64
if (buf->flags & DRM_TEGRA_SUBMIT_BUF_RELOC_BLOCKLINEAR)
written_ptr |= BIT(39);
iova |= BIT(39);
#endif
written_ptr = (u32)(iova >> buf->reloc.shift);
if (buf->reloc.gather_offset_words >= bo->gather_data_words)
return -EINVAL;