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PCI: tegra264: On EP_RESET poll for detect reset LTSSM

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When Root port applies secondary bus reset(SBR) or link disable, EP_RESET
interrupt is received at Endpoint. On EP_RESET poll for detect reset LTSSM
state which confirms that SBR reset released or link disable is cleared.
After polling perform Endpoint controller cold reset.

Due to HW bug 4777981, C2 x2/x1 LTSSM state doesn't move to detect reset
when SBR reset is released, instead it stays in hot reset state. In this
case perform Endpoint controller cold reset after poll timeout. PCIe link
still comes up in this case.

Bug 4777981
Bug 4785875

Change-Id: I89402aa7c963082510170b88a1f7a4ec481162be
Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3197116
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
This commit is contained in:
Manikanta Maddireddy
2024-08-20 18:20:26 +00:00
committed by Jon Hunter
parent 216461effa
commit a558aeb624
1 changed files with 2 additions and 4 deletions
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6
drivers/pci/controller/private-soc/pcie-tegra264-ep.c
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@@ -110,8 +110,7 @@
#define XPL_PL_LTSSM_STATE 0x1700 #define XPL_PL_LTSSM_STATE 0x1700
#define XPL_PL_LTSSM_STATE_FULL GENMASK(7, 0) #define XPL_PL_LTSSM_STATE_FULL GENMASK(7, 0)
#define XPL_PL_LTSSM_STATE_DISABLE_TX 40 #define XPL_PL_LTSSM_DETECT_QUIET 1
#define XPL_PL_LTSSM_STATE_HOT_RESET 41
#define NV_EP_PCFG_MSI_64_HEADER 0x48 #define NV_EP_PCFG_MSI_64_HEADER 0x48
@@ -570,8 +569,7 @@ static irqreturn_t tegra264_pcie_ep_irq_thread(int irq, void *arg)
int ret; int ret;
ret = readl_poll_timeout(pcie->xpl_base + XPL_PL_LTSSM_STATE, val, ret = readl_poll_timeout(pcie->xpl_base + XPL_PL_LTSSM_STATE, val,
((val & XPL_PL_LTSSM_STATE_FULL) == XPL_PL_LTSSM_STATE_DISABLE_TX) || (val & XPL_PL_LTSSM_STATE_FULL) == XPL_PL_LTSSM_DETECT_QUIET,
((val & XPL_PL_LTSSM_STATE_FULL) == XPL_PL_LTSSM_STATE_HOT_RESET),
PCIE_LTSSM_DELAY, PCIE_LTSSM_TIMEOUT); PCIE_LTSSM_DELAY, PCIE_LTSSM_TIMEOUT);
if (ret) if (ret)
dev_err(pcie->dev, "PCIe LTSSM state not in detect reset, ltssm: 0x%x\n", val); dev_err(pcie->dev, "PCIe LTSSM state not in detect reset, ltssm: 0x%x\n", val);