psc: fix the spurous interrupt

ccplex side sees two interrupts. The first one is handled
properly while the second one does not have bit MBOX_OUT_VAID
being set.

Fixing this by reading psc_ext_ctrl register after writing.

Bug 4741744

Change-Id: I22ac1619b7f88a96658c8d197f09daccf3bb40d8
Signed-off-by: Liang Cheng <licheng@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3174350
Reviewed-by: David Pu <dpu@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Liang Cheng
2024-07-12 21:53:12 +00:00
committed by mobile promotions
parent 7cba06ad35
commit a6d19ed508

View File

@@ -128,6 +128,8 @@ static irqreturn_t psc_mbox_rx_interrupt(int irq, void *p)
ext_ctrl = readl(vm_chan->base + MBOX_CHAN_EXT_CTRL); ext_ctrl = readl(vm_chan->base + MBOX_CHAN_EXT_CTRL);
ext_ctrl |= MBOX_OUT_DONE; ext_ctrl |= MBOX_OUT_DONE;
writel(ext_ctrl, vm_chan->base + MBOX_CHAN_EXT_CTRL); writel(ext_ctrl, vm_chan->base + MBOX_CHAN_EXT_CTRL);
/* Bug 4741744: extra read to clear spurous interrupt */
ext_ctrl = readl(vm_chan->base + MBOX_CHAN_EXT_CTRL);
return IRQ_HANDLED; return IRQ_HANDLED;
} }