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nvethernet: fix coverity defects
CID 9871576 Untrusted array index read CID 10112340 Dereference before null check CID 10127838 Unchecked return value CID 10127841 Dead default in switch CID 10127905 Unchecked return value CID 10127961 Unused value Bug 3461002 Change-Id: If041434e57295b282dacf06ed66b1a436b96a165 Signed-off-by: Bhadram Varka <vbhadram@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2665776 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: svcacv <svcacv@nvidia.com> Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com> Reviewed-by: Mohan Thadikamalla <mohant@nvidia.com> Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com> GVS: Gerrit_Virtual_Submit
This commit is contained in:
committed by
Revanth Kumar Uppala
parent
0bc5754577
commit
ad01764abb
@@ -4996,15 +4996,15 @@ static int ether_get_eqos_clks(struct ether_priv_data *pdata)
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goto err_tx;
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}
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/* This is optional clk */
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pdata->rx_m_clk = devm_clk_get(dev, "eqos_rx_m");
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if (IS_ERR(pdata->rx_m_clk)) {
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ret = PTR_ERR(pdata->rx_m_clk);
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dev_info(dev, "failed to get eqos_rx_m clk\n");
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}
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/* This is optional clk */
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pdata->rx_input_clk = devm_clk_get(dev, "eqos_rx_input");
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if (IS_ERR(pdata->rx_input_clk)) {
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ret = PTR_ERR(pdata->rx_input_clk);
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dev_info(dev, "failed to get eqos_rx_input clk\n");
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}
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2018-2021, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -1396,9 +1396,6 @@ static void ether_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
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{
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struct ether_priv_data *pdata = netdev_priv(ndev);
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wol->supported = 0;
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wol->wolopts = 0;
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if (!wol)
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return;
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@@ -1409,6 +1406,9 @@ static void ether_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
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return;
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}
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wol->supported = 0;
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wol->wolopts = 0;
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if (!phy_interrupt_is_valid(pdata->phydev))
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return;
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -141,6 +141,11 @@ static int ether_set_avb_algo(struct net_device *ndev,
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return ret;
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}
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if (ioctl_data.avb.qindex >= OSI_MGBE_MAX_NUM_QUEUES) {
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dev_err(pdata->dev, "Invalid queue index from user\n");
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return -EINVAL;
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}
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/* Check AVB mode disable on slot function enable */
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tx_ring = osi_dma->tx_ring[ioctl_data.avb.qindex];
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if (tx_ring && tx_ring->slot_check == OSI_ENABLE &&
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2018-2021, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -922,7 +922,12 @@ int osd_ivc_send_cmd(void *priv, ivc_msg_common_t *ivc_buf, unsigned int len)
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dcnt = IVC_READ_TIMEOUT_CNT;
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while ((!tegra_hv_ivc_can_read(ictxt->ivck))) {
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wait_for_completion_timeout(&ictxt->msg_complete, IVC_WAIT_TIMEOUT);
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if (!wait_for_completion_timeout(&ictxt->msg_complete,
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IVC_WAIT_TIMEOUT)) {
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ret = -ETIMEDOUT;
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goto fail;
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}
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dcnt--;
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if (!dcnt) {
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dev_err(pdata->dev, "IVC read timeout\n");
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -249,7 +249,12 @@ static int ether_test_loopback(struct ether_priv_data *pdata,
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if (ret)
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goto cleanup;
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wait_for_completion_timeout(&tpdata->comp, msecs_to_jiffies(200));
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if (!wait_for_completion_timeout(&tpdata->comp,
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msecs_to_jiffies(200))) {
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ret = -ETIMEDOUT;
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goto cleanup;
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}
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ret = !tpdata->completed;
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cleanup:
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dev_remove_pack(&tpdata->pt);
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -684,11 +684,10 @@ static int parse_inputs(const char *buf,
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case 2:
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flags |= OSI_LUT_FLAGS_BYTE2_PATTERN_VALID;
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break;
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default:
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case 3:
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flags |= OSI_LUT_FLAGS_BYTE3_PATTERN_VALID;
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break;
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default:
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break;
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}
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lut_in->byte_pattern[i] = byte[i];
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lut_in->byte_pattern_offset[i] = byte_offset[i];
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