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ufs: Add conftest to check is_ufs_already_enabled
Add conftest to check is_ufs_already_enabled Change-Id: Ia830afb2a72586f4da2323a4ab7df8e7eb9cc321 Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3312149 Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: svcacv <svcacv@nvidia.com> GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
committed by
Jon Hunter
parent
9a4387e137
commit
ae290b601b
@@ -1333,9 +1333,10 @@ static int ufs_tegra_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
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*/
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ufshcd_set_link_off(hba);
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/* TODO: Check why disabling clocks causing crash */
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if (ufs_tegra->soc->chip_id == TEGRA264) {
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#if defined(NV_UFS_HBA_STRUCT_HAS_BOOL_IS_UFS_ALREADY_ENABLED)
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hba->is_ufs_already_enabled = false;
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#endif
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ufs_tegra->mask_hs_mode_b = false;
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goto end;
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}
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@@ -1504,10 +1505,11 @@ static int ufs_tegra_pwr_change_notify(struct ufs_hba *hba,
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switch (status) {
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case PRE_CHANGE:
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#if defined(NV_UFS_HBA_STRUCT_HAS_BOOL_IS_UFS_ALREADY_ENABLED)
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/* Return if ufs is already initialised */
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if (hba->is_ufs_already_enabled)
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return 0;
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#endif
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/* Update VS_DebugSaveConfigTime Tref */
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ufshcd_dme_get(hba, UIC_ARG_MIB(VS_DEBUGSAVECONFIGTIME),
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&vs_save_config);
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@@ -1594,11 +1596,11 @@ static int ufs_tegra_pwr_change_notify(struct ufs_hba *hba,
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sizeof(struct ufs_pa_layer_attr));
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break;
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case POST_CHANGE:
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#if defined(NV_UFS_HBA_STRUCT_HAS_BOOL_IS_UFS_ALREADY_ENABLED)
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/* Return if ufs is already initialised */
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if (hba->is_ufs_already_enabled)
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return 0;
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#endif
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ufs_tegra_print_power_mode_config(hba, dev_req_params);
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ufshcd_dme_get(hba, UIC_ARG_MIB(PA_SCRAMBLING), &pa_reg_check);
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if (pa_reg_check & SCREN)
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@@ -1620,11 +1622,11 @@ static int ufs_tegra_hce_enable_notify(struct ufs_hba *hba,
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switch (status) {
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case PRE_CHANGE:
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#if defined(NV_UFS_HBA_STRUCT_HAS_BOOL_IS_UFS_ALREADY_ENABLED)
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/* Return if ufs is already initialised */
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if (hba->is_ufs_already_enabled)
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return 0;
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#endif
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if (ufs_tegra->soc->chip_id != TEGRA264) {
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err = ufs_tegra_host_clk_enable(dev,
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"mphy_force_ls_mode",
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@@ -1638,11 +1640,11 @@ static int ufs_tegra_hce_enable_notify(struct ufs_hba *hba,
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UFSHC_AUX_UFSHC_DEV_CTRL_0);
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break;
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case POST_CHANGE:
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#if defined(NV_UFS_HBA_STRUCT_HAS_BOOL_IS_UFS_ALREADY_ENABLED)
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/* Return if ufs is already initialised */
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if (hba->is_ufs_already_enabled)
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return 0;
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#endif
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ufs_aux_clear_bits(ufs_tegra->ufs_aux_base,
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UFSHC_CG_SYS_CLK_OVR_ON,
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UFSHC_AUX_UFSHC_SW_EN_CLK_SLCG_0);
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@@ -1712,20 +1714,22 @@ static int ufs_tegra_link_startup_notify(struct ufs_hba *hba,
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switch (status) {
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case PRE_CHANGE:
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#if defined(NV_UFS_HBA_STRUCT_HAS_BOOL_IS_UFS_ALREADY_ENABLED)
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/* Link is initialized by earlier firmware */
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if (hba->is_ufs_already_enabled)
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return 0;
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#endif
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ufs_tegra_mphy_rx_sync_capability(ufs_tegra);
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ufs_tegra_unipro_pre_linkup(hba);
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/* Enable TX link calibration */
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err = ufs_tegra_mphy_tx_calibration_enable(ufs_tegra);
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break;
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case POST_CHANGE:
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#if defined(NV_UFS_HBA_STRUCT_HAS_BOOL_IS_UFS_ALREADY_ENABLED)
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/* Link is initialized by earlier firmware */
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if (hba->is_ufs_already_enabled)
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return 0;
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#endif
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/* Check TX link calibration status */
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err = ufs_tegra_mphy_check_tx_calibration_done_status(ufs_tegra);
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if (err) {
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@@ -1843,8 +1847,9 @@ static int ufs_tegra_init(struct ufs_hba *hba)
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resource_size_t ufs_virt_base_addr = 0, ufs_virt_addr_range = 0;
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struct iommu_fwspec *fwspec;
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u32 virt_ctrl_en = 0;
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#if defined(NV_UFS_HBA_STRUCT_HAS_BOOL_IS_UFS_ALREADY_ENABLED)
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u32 val;
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#endif
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ufs_tegra = devm_kzalloc(dev, sizeof(*ufs_tegra), GFP_KERNEL);
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if (!ufs_tegra) {
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err = -ENOMEM;
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@@ -1859,7 +1864,9 @@ static int ufs_tegra_init(struct ufs_hba *hba)
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ufs_tegra->ufshc_state = UFSHC_INIT;
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ufs_tegra->hba = hba;
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hba->priv = (void *)ufs_tegra;
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#if defined(NV_UFS_HBA_STRUCT_HAS_BOOL_IS_UFS_ALREADY_ENABLED)
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hba->is_ufs_already_enabled = false;
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#endif
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err = ufs_tegra_config_soc_data(ufs_tegra);
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if (err)
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@@ -2002,6 +2009,7 @@ ufs_clk_deassert:
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if (tegra_sku_info.platform == TEGRA_PLATFORM_SYSTEM_FPGA)
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goto end;
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#if defined(NV_UFS_HBA_STRUCT_HAS_BOOL_IS_UFS_ALREADY_ENABLED)
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val = ufshcd_readl(hba, REG_CONTROLLER_ENABLE);
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if (val) {
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/* If already initialised, do not configure ufs */
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@@ -2011,7 +2019,7 @@ ufs_clk_deassert:
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/* ufs already initialised. Do not configure ufs */
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goto end;
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}
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#endif
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err = ufs_tegra_mphy_rx_advgran(ufs_tegra);
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if (err)
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goto out_disable_mphylane_clks;
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@@ -227,6 +227,7 @@ NV_CONFTEST_FUNCTION_COMPILE_TESTS += ufs_hba_variant_ops_pwr_change_notify_has_
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NV_CONFTEST_FUNCTION_COMPILE_TESTS += ufs_hba_variant_ops_suspend_has_status_arg
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NV_CONFTEST_FUNCTION_COMPILE_TESTS += ufshcd_quirks_enum_has_ufshcd_quirk_broken_64bit_address
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NV_CONFTEST_FUNCTION_COMPILE_TESTS += ufshcd_quirks_enum_has_ufshcd_quirk_broken_power_seqeunce
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NV_CONFTEST_FUNCTION_COMPILE_TESTS += ufshcd_ufs_hba_struct_has_bool_is_ufs_already_enabled
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NV_CONFTEST_FUNCTION_COMPILE_TESTS += v4l2_async_connection_struct_present
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NV_CONFTEST_FUNCTION_COMPILE_TESTS += v4l2_async_match_type_enum_present
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NV_CONFTEST_FUNCTION_COMPILE_TESTS += v4l2_async_subdev_nf_init
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@@ -8783,6 +8783,21 @@ compile_test() {
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compile_check_conftest "$CODE" "NV_UFSHCD_QUIRKS_ENUM_HAS_UFSHCD_QUIRK_BROKEN_POWER_SEQUENCE" "" "types"
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;;
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ufshcd_ufs_hba_struct_has_bool_is_ufs_already_enabled)
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#
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# Determine if the 'ufs_hba' structure has
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# bool 'is_ufs_already_enabled'.
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#
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#
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CODE="
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#include <ufs/ufshcd.h>
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int ufshcd_ufs_hba_struct_has_bool_is_ufs_already_enabled(void) {
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return offsetof(struct ufs_hba, is_ufs_already_enabled);
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}"
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compile_check_conftest "$CODE" "NV_UFS_HBA_STRUCT_HAS_BOOL_IS_UFS_ALREADY_ENABLED" "" "types"
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;;
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v4l2_async_connection_struct_present)
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#
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# Determine if the 'struct v4l2_async_connection' present or not.
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