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drm/tegra: Revert workaround for freeing BOs

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Commit 72c23bd789f4 ("drm/tegra: Ensure BOs are not freed before
display is updated") added a workaround to fix a race condition when
freeing BOs. A proper fix has been created for the BO caching for
host1x that has been submitted upstream and so revert commit
72c23bd789f4.

Bug 3556250

Change-Id: Ie47e734393770a1390acff20ee133576a335f38f
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2693868
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Jon Hunter
2022-04-01 17:01:09 +01:00
committed by Laxman Dewangan
parent 43cafba95d
commit aec071d698
1 changed files with 3 additions and 10 deletions
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13
drivers/gpu/drm/tegra/dc.c
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@@ -2293,8 +2293,6 @@ static void tegra_crtc_atomic_begin(struct drm_crtc *crtc,
crtc->state->event = NULL; crtc->state->event = NULL;
} }
tegra_dc_disable_vblank(crtc);
} }
static void tegra_crtc_atomic_flush(struct drm_crtc *crtc, static void tegra_crtc_atomic_flush(struct drm_crtc *crtc,
@@ -2321,8 +2319,6 @@ static void tegra_crtc_atomic_flush(struct drm_crtc *crtc,
value = dc_state->planes | GENERAL_ACT_REQ; value = dc_state->planes | GENERAL_ACT_REQ;
tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL); tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL);
value = tegra_dc_readl(dc, DC_CMD_STATE_CONTROL); value = tegra_dc_readl(dc, DC_CMD_STATE_CONTROL);
tegra_dc_enable_vblank(crtc);
} }
static bool tegra_plane_is_cursor(const struct drm_plane_state *state) static bool tegra_plane_is_cursor(const struct drm_plane_state *state)
@@ -2539,10 +2535,9 @@ static const struct drm_crtc_helper_funcs tegra_crtc_helper_funcs = {
static irqreturn_t tegra_dc_irq(int irq, void *data) static irqreturn_t tegra_dc_irq(int irq, void *data)
{ {
struct tegra_dc *dc = data; struct tegra_dc *dc = data;
u32 status, value, mask; unsigned long status;
mask = tegra_dc_readl(dc, DC_CMD_INT_MASK); status = tegra_dc_readl(dc, DC_CMD_INT_STATUS);
status = tegra_dc_readl(dc, DC_CMD_INT_STATUS) & mask;
tegra_dc_writel(dc, status, DC_CMD_INT_STATUS); tegra_dc_writel(dc, status, DC_CMD_INT_STATUS);
if (status & FRAME_END_INT) { if (status & FRAME_END_INT) {
@@ -2557,9 +2552,7 @@ static irqreturn_t tegra_dc_irq(int irq, void *data)
/* /*
dev_dbg(dc->dev, "%s(): vertical blank\n", __func__); dev_dbg(dc->dev, "%s(): vertical blank\n", __func__);
*/ */
value = tegra_dc_readl(dc, DC_CMD_STATE_CONTROL); drm_crtc_handle_vblank(&dc->base);
if (!value)
drm_crtc_handle_vblank(&dc->base);
dc->stats.vblank_total++; dc->stats.vblank_total++;
dc->stats.vblank++; dc->stats.vblank++;
} }