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tty: wch: Fix C-CERT coverity issues
C-CERT coverity issues fix for wch tty serial driver CID:679040 CID:678956 CID:678957 CID:679059 CID:678985 CID:679029 CID:679037 CID:679049 Bug 3959323 Change-Id: If34f5490b80d19162df60235fc74f0427a0caf07 Signed-off-by: Ankit patel <anpatel@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2992040 GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com>
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@@ -1,16 +1,16 @@
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/*
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/*
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* Copyright (c) 2021-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: LicenseRef-NvidiaProprietary
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* NVIDIA CORPORATION, its affiliates and licensors retain all intellectual
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* under the terms and conditions of the GNU General Public License,
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* property and proprietary rights in and to this material, related
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* version 2, as published by the Free Software Foundation.
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* documentation and any modifications thereto. Any use, reproduction,
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*
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* disclosure or distribution of this material and related documentation
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* This program is distributed in the hope it will be useful, but WITHOUT
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* without an express license agreement from NVIDIA CORPORATION or
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* its affiliates is strictly prohibited.
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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*/
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#ifndef WCH_COMMON
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#ifndef WCH_COMMON
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#define WCH_COMMON
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#define WCH_COMMON
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@@ -221,7 +221,7 @@ enum {
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#define PORTFLAG_CH384_28_PORTS 0x0020
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#define PORTFLAG_CH384_28_PORTS 0x0020
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// board info
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// board info
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#define WCH_BOARDS_MAX 0x08
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#define WCH_BOARDS_MAX 0x04
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#define WCH_PORT_ONBOARD_MAX 0x20
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#define WCH_PORT_ONBOARD_MAX 0x20
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#define WCH_SER_TOTAL_MAX 0x100
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#define WCH_SER_TOTAL_MAX 0x100
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@@ -1,3 +1,15 @@
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/*
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* SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: LicenseRef-NvidiaProprietary
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*
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* NVIDIA CORPORATION, its affiliates and licensors retain all intellectual
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* property and proprietary rights in and to this material, related
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* documentation and any modifications thereto. Any use, reproduction,
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* disclosure or distribution of this material and related documentation
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* without an express license agreement from NVIDIA CORPORATION or
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* its affiliates is strictly prohibited.
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*/
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/*
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/*
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* PCI/PCIE to serial driver for ch351/352/353/355/356/357/358/359/382/384, etc.
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* PCI/PCIE to serial driver for ch351/352/353/355/356/357/358/359/382/384, etc.
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*
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*
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@@ -31,20 +43,6 @@
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* V1.24 - fixed ch351/2/3 uart0 setting bug, merged pre-load driver
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* V1.24 - fixed ch351/2/3 uart0 setting bug, merged pre-load driver
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*/
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*/
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/*
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* Copyright (c) 2021-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include "wch_common.h"
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#include "wch_common.h"
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extern struct wch_board wch_board_table[WCH_BOARDS_MAX];
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extern struct wch_board wch_board_table[WCH_BOARDS_MAX];
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@@ -112,6 +110,9 @@ static irqreturn_t wch_interrupt(int irq, void *dev_id)
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int status = 0;
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int status = 0;
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int handled = IRQ_NONE;
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int handled = IRQ_NONE;
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if (!dev_id)
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return handled;
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for (i = 0; i < WCH_BOARDS_MAX; i++) {
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for (i = 0; i < WCH_BOARDS_MAX; i++) {
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if (dev_id == &(wch_board_table[i])) {
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if (dev_id == &(wch_board_table[i])) {
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sb = dev_id;
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sb = dev_id;
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@@ -159,7 +160,7 @@ static int wch_pci_board_probe(void)
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struct pci_dev *pdev = NULL;
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struct pci_dev *pdev = NULL;
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struct pci_dev *pdev_array[4] = {NULL, NULL, NULL, NULL};
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struct pci_dev *pdev_array[4] = {NULL, NULL, NULL, NULL};
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int wch_pci_board_id_cnt;
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size_t wch_pci_board_id_cnt;
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int table_cnt;
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int table_cnt;
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int board_cnt;
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int board_cnt;
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int i;
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int i;
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@@ -234,7 +235,7 @@ static int wch_pci_board_probe(void)
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}
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}
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board_cnt++;
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board_cnt++;
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if (board_cnt > WCH_BOARDS_MAX) {
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if (board_cnt > WCH_BOARDS_MAX) {
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printk("\n");
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printk("\n");
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printk("WCH Error: WCH Driver Module Support Four Boards In Maximum !\n\n");
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printk("WCH Error: WCH Driver Module Support Four Boards In Maximum !\n\n");
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status = -ENOSPC;
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status = -ENOSPC;
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@@ -248,7 +249,7 @@ static int wch_pci_board_probe(void)
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sb->bus_number = pdev->bus->number;
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sb->bus_number = pdev->bus->number;
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sb->dev_number = PCI_SLOT(pdev->devfn);
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sb->dev_number = PCI_SLOT(pdev->devfn);
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sb->board_enum = (int)wch_pci_board_id[table_cnt].driver_data;
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sb->board_enum = (unsigned int)wch_pci_board_id[table_cnt].driver_data;
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sb->pb_info = wch_pci_board_conf[sb->board_enum];
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sb->pb_info = wch_pci_board_conf[sb->board_enum];
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sb->board_flag = sb->pb_info.board_flag;
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sb->board_flag = sb->pb_info.board_flag;
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@@ -367,9 +368,9 @@ static int wch_assign_resource(void)
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return status;
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return status;
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}
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}
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for (j = 0; j < sb->ser_ports; j++, ser_n++, sp++) {
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for (j = 0; j < sb->ser_ports && j < WCH_PORT_ONBOARD_MAX ; j++, ser_n++, sp++) {
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sp->port.chip_flag = sb->pb_info.port[j].chip_flag;
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sp->port.chip_flag = sb->pb_info.port[j].chip_flag;
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sp->port.iobase = sb->bar_addr[sb->pb_info.port[j].bar1] + sb->pb_info.port[j].offset1;
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sp->port.iobase = sb->bar_addr[sb->pb_info.port[j].bar1] + sb->pb_info.port[j].offset1;
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/* use scr reg to test io space */
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/* use scr reg to test io space */
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outb(0x55, sp->port.iobase + UART_SCR);
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outb(0x55, sp->port.iobase + UART_SCR);
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@@ -1,14 +1,13 @@
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/*
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/*
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* Copyright (c) 2021-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: LicenseRef-NvidiaProprietary
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* NVIDIA CORPORATION, its affiliates and licensors retain all intellectual
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* under the terms and conditions of the GNU General Public License,
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* property and proprietary rights in and to this material, related
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* version 2, as published by the Free Software Foundation.
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* documentation and any modifications thereto. Any use, reproduction,
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*
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* disclosure or distribution of this material and related documentation
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* This program is distributed in the hope it will be useful, but WITHOUT
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* without an express license agreement from NVIDIA CORPORATION or
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* its affiliates is strictly prohibited.
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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*/
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#include <nvidia/conftest.h>
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#include <nvidia/conftest.h>
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@@ -545,7 +544,7 @@ static int ser_startup(struct ser_state *state, int init_hw)
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retval = wch_ser_startup(port);
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retval = wch_ser_startup(port);
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if (retval == 0) {
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if (retval == 0) {
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if (init_hw) {
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if (init_hw && info->tty) {
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ser_change_speed(state, NULL);
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ser_change_speed(state, NULL);
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if (info->tty->termios.c_cflag & CBAUD)
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if (info->tty->termios.c_cflag & CBAUD)
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{
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{
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@@ -555,7 +554,8 @@ static int ser_startup(struct ser_state *state, int init_hw)
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info->flags |= WCH_UIF_INITIALIZED;
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info->flags |= WCH_UIF_INITIALIZED;
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clear_bit(TTY_IO_ERROR, &info->tty->flags);
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if (info->tty)
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clear_bit(TTY_IO_ERROR, &info->tty->flags);
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}
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}
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if (retval && capable(CAP_SYS_ADMIN)) {
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if (retval && capable(CAP_SYS_ADMIN)) {
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@@ -1106,26 +1106,28 @@ static int ser_wait_modem_status(struct ser_state *state, unsigned long arg)
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static int ser_get_count(struct ser_state *state, struct serial_icounter_struct *icnt)
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static int ser_get_count(struct ser_state *state, struct serial_icounter_struct *icnt)
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{
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{
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struct serial_icounter_struct icount;
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struct serial_icounter_struct *icount;
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struct ser_icount cnow;
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struct ser_icount cnow;
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struct ser_port *port = state->port;
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struct ser_port *port = state->port;
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spin_lock_irq(&port->lock);
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spin_lock_irq(&port->lock);
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memcpy(&cnow, &port->icount, sizeof(struct ser_icount));
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memcpy(&cnow, &port->icount, sizeof(struct ser_icount));
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spin_unlock_irq(&port->lock);
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spin_unlock_irq(&port->lock);
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icount.cts = cnow.cts;
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icount = kzalloc(sizeof(*icount), GFP_KERNEL);
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icount.dsr = cnow.dsr;
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icount.rng = cnow.rng;
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icount.dcd = cnow.dcd;
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icount.rx = cnow.rx;
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icount.tx = cnow.tx;
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icount.frame = cnow.frame;
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icount.overrun = cnow.overrun;
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icount.parity = cnow.parity;
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icount.brk = cnow.brk;
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icount.buf_overrun = cnow.buf_overrun;
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return copy_to_user(icnt, &icount, sizeof(icount)) ? -EFAULT : 0;
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icount->cts = cnow.cts;
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icount->dsr = cnow.dsr;
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icount->rng = cnow.rng;
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icount->dcd = cnow.dcd;
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icount->rx = cnow.rx;
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icount->tx = cnow.tx;
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icount->frame = cnow.frame;
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icount->overrun = cnow.overrun;
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icount->parity = cnow.parity;
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icount->brk = cnow.brk;
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icount->buf_overrun = cnow.buf_overrun;
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return copy_to_user(icnt, icount, sizeof(*icount)) ? -EFAULT : 0;
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}
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}
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static void ser_config_rs485(struct ser_state *state, struct serial_rs485 *rs485)
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static void ser_config_rs485(struct ser_state *state, struct serial_rs485 *rs485)
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