mirror of
git://nv-tegra.nvidia.com/linux-nv-oot.git
synced 2025-12-22 09:11:26 +03:00
NVVSE SM3 Implementation
Implements SM3 in NVVSE crypto driver linux ESSS-1346 Change-Id: I9f8b9bc18d7c30d8dac04e8f19941ef061aa8478 Signed-off-by: Khushi <khushi@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3131643 Reviewed-by: Leo Chiu <lchiu@nvidia.com> Reviewed-by: Sandeep Trasi <strasi@nvidia.com> GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
committed by
mobile promotions
parent
a5b6d4a5b6
commit
b7a1a14256
@@ -1,7 +1,9 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* Copyright (c) 2021-2023, NVIDIA CORPORATION & AFFILIATES. All Rights Reserved.
|
||||
* SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Cryptographic API.
|
||||
*/
|
||||
|
||||
#ifndef __UAPI_TEGRA_NVVSE_CRYPTODEV_H
|
||||
@@ -61,6 +63,8 @@ enum tegra_nvvse_sha_type {
|
||||
TEGRA_NVVSE_SHA_TYPE_SHAKE128,
|
||||
/** Defines SHAKE256 Type */
|
||||
TEGRA_NVVSE_SHA_TYPE_SHAKE256,
|
||||
/** Defines SM3 Type */
|
||||
TEGRA_NVVSE_SHA_TYPE_SM3,
|
||||
/** Defines maximum SHA Type, must be last entry */
|
||||
TEGRA_NVVSE_SHA_TYPE_MAX,
|
||||
};
|
||||
|
||||
Reference in New Issue
Block a user